PEF 2055 N V2.1 Infineon Technologies, PEF 2055 N V2.1 Datasheet - Page 136
PEF 2055 N V2.1
Manufacturer Part Number
PEF 2055 N V2.1
Description
IC INTERFACE CTRLR PCM LCC-44
Manufacturer
Infineon Technologies
Series
EPICr
Datasheet
1.PEF_2054_N_V2.1.pdf
(269 pages)
Specifications of PEF 2055 N V2.1
Function
PCM Interface Controller
Interface
ISDN, PCM
Number Of Circuits
1
Voltage - Supply
5V
Current - Supply
9.5mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
44-LCC
Includes
Board Controller, Channel Switching
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PEF2055NV2.1X
PEF2055NV21XK
SP000075706
PEF2055NV21XK
SP000075706
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W:MACR =
Table 22
MOC3 … 0
0000
0001
0011
0010
0111
0110
0101
0100
W:MACR = 1000 0000
The Procedure for Writing to the Upstream DM Data Field is
W:MADR = value to be transmitted in the PCM (sub)time slot
W:MAAR = address of the desired (upstream)
MOC3 … 0 defines the bandwidth and the position of the subchannel according to
table 22.
The Procedure for Reading the DM Data Field is
W:MAAR = address of the desired PCM time slot encoded according to figure 48
wait for STAR:MAC = 0
R:MADR = value
Figure 49 illustrates the access to the Data Memory Data Field.
1)
2)
Semiconductor Group
The U/D bit of MAAR will implicitly be set to 1.
When reading a DM data field location, all 8 bits are read regardless of the bandwidth selected by the MOC
bits.
figure 48
bit 7
0
B
MOC3
= 80
H
Transferred Bits
–
bits 7 … 0
bits 7 … 4
bits 3 … 0
bits 7 … 6
bits 5 … 4
bits 3 … 2
bits 1 … 0
2)
MOC2
136
MOC1
1)
PCM time slot encoded according to
MOC0
Channel Bandwidth
–
64 kbit/s
32 kbit/s
32 kbit/s
16 kbit/s
16 kbit/s
16 kbit/s
16 kbit/s
0
Application Hints
0
PEB 2055
PEF 2055
bit 0
0
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