SC28L202A1DGG,129 NXP Semiconductors, SC28L202A1DGG,129 Datasheet - Page 50
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SC28L202A1DGG,129
Manufacturer Part Number
SC28L202A1DGG,129
Description
IC DUART 3.3V-5.0V 56-TSSOP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet
1.SC28L202A1DGG118.pdf
(77 pages)
Specifications of SC28L202A1DGG,129
Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
256 Byte
Voltage - Supply
3.3V, 5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
56-TFSOP (0.240", 6.10mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935276109129
Philips Semiconductors
CSR A – Channel A Clock Select Register CSR A [7:4] – Channel A Receiver Clock Select
This field selects the baud rate clock for the Channel A receiver. The field definition is shown in Table 13.
CSR Clock Select Register
Table 13. Baud Rate (Base on a 14.7456 MHz crystal clock)
NOTE: The receiver clock is always a 16X clock except for CSR A [7:4] = 1111.
CSR A [3:0] – Channel A EXTERNAL Transmitter Clock Select
This field selects the baud rate clock for the Channel A transmitter.
The field definition is as shown in Table 13, except as follows:
The transmitter clock is always a 16X clock except for
CSR[3:0] = 1111.
CSR B [7:4] – Channel B Receiver Clock Select
This field selects the baud rate clock for the Channel B receiver. The
field definition is as shown in Table 13, except as follows:
Rx FIFO Register. For characters shorter than 8 bits the unused bits are set to zero
Tx FIFO register. For characters shorter than 8 bits the unused bits are set to zero
2005 Nov 01
CSR A & CSR B
CSR A [7:4]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
CSR A [3:0]
1110
1111
CSR B [7:4]
1110
111
Dual UART
Bit 7
Bits of the received data characters.
Bit 7
Bits of the data characters to be transmitted
MR0[0] = 0 (Normal Mode)
ACR[7] = 0
50
110
134.5
200
300
600
1,200
1,050
2,400
4,800
7,200
9,600
38.4K
Timer
I/O4 A–16X
I/O4 A–1X
ACR[7] = 0
I/O3 A–16X
I/O3 A–1X
ACR[7] = 0
I/O6 A–16X
I/O6 A–1X
Bit 7
RECEIVER CLOCK SELECT
See Text and Table 13
BIT 6
BIT 6
BIT 6
ACR[7] = 1
75
110
134.5
150
300
600
1,200
2,000
2,400
4,800
1,800
9,600
19.2K
Timer
I/O4 A–16X
I/O4 A–1X
ACR[7] = 1
I/O3 A–16X
I/O3 A–1X
ACR[7] = 1
I/O6 A–16X
I/O6 A–1X
BIT 5
BIT 5
BIT 5
MR0[0] = 1 (Extended Mode I)
ACR[7] = 0
300
110
134.5
1200
1800
3600
7200
1,050
14.4K
28.8K
7,200
57.6K
230.4K
Timer
I/O4 A–16X
I/O4 A–1X
BIT 4
BIT 4
BIT 4
44
The receiver clock is always a 16X clock except for
CSR B[7:4] = 1111.
CSR B [3:0] – Channel B Transmitter Clock Select
This field selects the baud rate clock for the Channel B transmitter.
The field definition is as shown in Table 13, except as follows:
The transmitter clock is always a 16X clock except for
CSR B[3:0] = 1111.
CSR B [3:0]
1110
1111
ACR[7] = 1
450
110
134.5
900
1800
3600
7,200
2,000
14.4K
28.8K
1,800
57.6K
115.2K
Timer
I/O4 A–16X
I/O4 A–1X
BIT 3
BIT 3
BIT 3
TRANSMITTER CLOCK SELECT
See Text and Table 13
ACR[7] = 0
I/O5 A–16X
I/O5 A–1X
BIT 2
BIT 2
MR0[2] = 1 (Extended Mode II)
ACR[7] = 0
4,800
880
1,076
19.2K
28.8K
57.6K
115.2K
1,050
57.6K
4,800
57.6K
9,600
38.4K
Timer
I/O4 A–16X
I/O4 A–1X
BIT 2
BIT 1
BIT 1
BIT 1
ACR[7] = 1
I/O5 A–16X
I/O5 A–1X
ACR[7] = 1
7,200
880
1,076
14.4K
28.8K
57.6K
115.2K
2,000
57.6K
4,800
14.4K
9,600
19.2K
Timer
I/O4 A–16X
I/O4 A–1X
SC28L202
Product data sheet
BIT 0
BIT 0
BIT 0