SC28L202A1DGG,129 NXP Semiconductors, SC28L202A1DGG,129 Datasheet - Page 73
![IC DUART 3.3V-5.0V 56-TSSOP](/photos/6/93/69379/56-tssop_sot364-1_pkg_sml.jpg)
SC28L202A1DGG,129
Manufacturer Part Number
SC28L202A1DGG,129
Description
IC DUART 3.3V-5.0V 56-TSSOP
Manufacturer
NXP Semiconductors
Series
IMPACTr
Datasheet
1.SC28L202A1DGG118.pdf
(77 pages)
Specifications of SC28L202A1DGG,129
Features
False-start Bit Detection
Number Of Channels
2, DUART
Fifo's
256 Byte
Voltage - Supply
3.3V, 5V
With Parallel Port
Yes
With Auto Flow Control
Yes
With False Start Bit Detection
Yes
With Modem Control
Yes
With Cmos
Yes
Mounting Type
Surface Mount
Package / Case
56-TFSOP (0.240", 6.10mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
935276109129
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Philips Semiconductors
2005 Nov 01
Dual UART
TRANSMITTER
NOTES:
1. Timing shown for MR1[7] = 1.
2. Shown for OPCR[4] = 1 and MR[6] = 0.
RECEIVER
ENABLED
ENABLED
RDN/WRN
RxRDY
TxRDY
(SR2)
(SR0)
RECEIVER
WRN
OVERRUN
ENABLED
RxD
TxD
RxRDY/
RxRDY
FFULL
FFULL
(OP5)
(OP0)
(SR0)
(SR1)
(SR4)
MR1[4:3] = 11
RTS
RDN
RxD
MASTER STATION
PERIPHERAL STATION
MR1[4:3] = 11
MR1[2] = 1
2
1
OPR[0] = 1
ADD#1 MR1[2] = 0 D0
BIT 9
0
D1
STATUS DATA
ADD#1
ADD#1 1
D1
BIT 9
1
D2
BIT 9
ADD#1
Figure 16. Receiver Timing
Figure 17. Wake-Up Mode
D0
D0
D8
BIT 9
0
BIT 9
0
67
D11 WILL BE LOST
DUE TO OVERRUN
STATUS DATA
D9
D0
MR1[2] = 1 ADD#2
D10
STATUS DATA
D2
D11
STATUS DATA
D3
D12, D13 WILL BE LOST
DUE TO RECEIVER DISABLE.
ADD#2 1
ADD#2 1
D12
STATUS DATA
BIT 9
D10
BIT 9
RESET BY COMMAND
SC28L202
STATUS DATA
Product data sheet
D13
ADD#2
SD00156
BIT 9
0
SD00096
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