SC16C652IB48,151 NXP Semiconductors, SC16C652IB48,151 Datasheet
SC16C652IB48,151
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935270032151
SC16C652IB48-S
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SC16C652IB48,151 Summary of contents
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SC16C652 Dual UART with 32 bytes of transmit and receive FIFOs Rev. 04 — 20 June 2003 1. Description The SC16C652 channel Universal Asynchronous Receiver and Transmitter (UART) used for serial data communications. Its principal function is ...
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Philips Semiconductors Fully programmable character formatting: False start-bit detection Complete status reporting capabilities 3-State output TTL drive capabilities for bi-directional data bus and control bus Line Break generation and detection Internal diagnostic capabilities: Prioritized interrupt system controls Modem control functions ...
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Philips Semiconductors 4. Block diagram SC16C652 D0–D7 DATA BUS IOR AND IOW CONTROL LOGIC RESET A0–A2 REGISTER CSA SELECT CSB LOGIC INTA, INTB INTERRUPT TXRDYA, TXRDYB CONTROL RXRDYA, RXRDYB LOGIC Fig 1. SC16C652 block diagram. 9397 750 11634 Product data ...
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Philips Semiconductors 5. Pinning information 5.1 Pinning Fig 2. LQFP48 pin configuration. 5.2 Pin description Table 2: Pin description Symbol Pin Type Description LQFP48 Address 0 select bit. Internal register address selection Address 1 ...
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Philips Semiconductors Table 2: Pin description …continued Symbol Pin Type Description LQFP48 INTA, INTB 30 Interrupt A, B (3-State). This function is associated with individual channel interrupts, INTA, INTB. INTA, INTB are enabled when MCR bit 3 is ...
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Philips Semiconductors Table 2: Pin description …continued Symbol Pin Type Description LQFP48 CTSA, 38 Clear to Send (Active-LOW). These inputs are associated with individual UART CTSB channels, A through B. A logic 0 on the CTS pin indicates ...
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Philips Semiconductors 6. Functional description The SC16C652 provides serial asynchronous receive data synchronization, parallel-to-serial and serial-to-parallel data conversions for both the transmitter and receiver sections. These functions are necessary for converting the serial data stream into parallel data that is ...
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Philips Semiconductors 6.2 Internal registers The SC16C652 provides two sets of internal registers (A and B) consisting of 12 registers each for monitoring and controlling the functions of each channel of the UART. These registers are shown in holding registers ...
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Philips Semiconductors Table 5: Selected trigger level (characters 6.4 Hardware flow control When automatic hardware flow control is enabled, the SC16C652 monitors the CTS pin for a remote buffer overflow indication and controls the RTS pin ...
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Philips Semiconductors In the event that the receive buffer is overfilling and flow control needs to be executed, the SC16C652 automatically sends an Xoff message (when enabled) via the serial TX output to the remote modem. The SC16C652 sends the ...
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Philips Semiconductors 6.8 Programmable baud rate generator The SC16C652 supports high speed modem technologies that have increased input data rates by employing data compression schemes. For example, a 33.6 kbit/s modem that employs data compression may require a 115.2 kbit/s ...
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Philips Semiconductors Table 6: Output baud rate 50 75 110 150 300 600 1200 2400 3600 4800 7200 9600 19.2 k 38.4 k 57.6 k 115.2 k 6.9 DMA operation The SC16C652 FIFO trigger level provides additional flexibility to the ...
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Philips Semiconductors their normal modem control inputs pins, and instead are connected internally to RTS, DTR, MCR[3] (OP2) and MCR[2] (OP1). Loop-back test data is entered into the transmit holding register via the user data bus interface, D0-D7. The transmit ...
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Philips Semiconductors 7. Register descriptions Table 9 assigned bit functions are more fully defined in Table 9: SC16C652 internal registers Shaded bits are only accessible when EFR[4] is set. [ Register Default [2] General Register Set 0 ...
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Philips Semiconductors 7.1 Transmit (THR) and Receive (RHR) Holding Registers The serial transmitter section consists of an 8-bit Transmit Hold Register (THR) and Transmit Shift Register (TSR). The status of the THR is provided in the Line Status Register (LSR). ...
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Philips Semiconductors Table 10: Bit 7.2.1 IER versus Transmit/Receive FIFO interrupt mode operation When the receive FIFO (FCR[0] = logic 1), and receive interrupts (IER[0] = logic 1) are enabled, the receive interrupts and register status will ...
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Philips Semiconductors 7.2.2 IER versus Receive/Transmit FIFO polled mode operation When FCR[0] = logic 1, resetting IER[0-3] enables the SC16C652 in the FIFO polled mode of operation. In this mode, interrupts are not generated and the user must poll the ...
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Philips Semiconductors 7.3.2 FIFO mode Table 11: Bit 7-6 5 9397 750 11634 Product data Dual UART with 32 bytes of transmit and receive FIFOs FIFO Control Register bits description Symbol Description FCR[7] RCVR trigger. These bits are ...
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Philips Semiconductors Table 11: Bit 1 0 Table 12: FCR[ Table 13: FCR[ 9397 750 11634 Product data Dual UART with 32 bytes of transmit and receive FIFOs FIFO Control Register bits ...
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Philips Semiconductors 7.4 Interrupt Status Register (ISR) The SC16C652 provides six levels of prioritized interrupts to minimize external software interaction. The Interrupt Status Register (ISR) provides the user with four interrupt status bits. Performing a read cycle on the ISR ...
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Philips Semiconductors 7.5 Line Control Register (LCR) The Line Control Register is used to specify the asynchronous data communication format. The word length, the number of stop bits, and the parity are selected by writing the appropriate bits in this ...
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Philips Semiconductors 7.6 Modem Control Register (MCR) This register controls the interface with the modem or a peripheral device. Table 20: Bit 9397 750 11634 Product data Dual UART with 32 bytes ...
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Philips Semiconductors 7.7 Line Status Register (LSR) This register provides the status of data transfers between the SC16C652 and the CPU. Table 21: Bit 9397 750 11634 Product data Dual UART with 32 bytes ...
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Philips Semiconductors Table 21: Bit 1 0 7.8 Modem Status Register (MSR) This register provides the current state of the control interface signals from the modem, or other peripheral device to which the SC16C652 is connected. Four bits of this ...
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Philips Semiconductors Table 22: Bit 1 0 [1] Whenever any MSR bit 0-3 is set to logic 1, a Modem Status Interrupt will be generated. 7.9 Scratchpad Register (SPR) The SC16C652 provides a temporary data register to store 8 bits ...
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Philips Semiconductors Table 23: Bit 5 4 3-0 Table 24: Cont [1] When using a software flow control the Xon/Xoff characters cannot be used for data transfer. 9397 750 11634 ...
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Philips Semiconductors 7.11 SC16C652 external reset condition Table 25: Register IER FCR ISR LCR MCR LSR MSR SPR DLL DLM Table 26: Output TXA, TXB OP2A, OP2B RTSA, RTSB DTRA, DTRB INTA, INTB 8. Limiting values Table 27: In accordance ...
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Philips Semiconductors 9. Static characteristics Table 28: DC electrical characteristics + 2 5.0 V 10%, unless otherwise specified. amb CC Symbol Parameter V LOW-level clock input voltage IL(CK) ...
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Philips Semiconductors 10. Dynamic characteristics Table 29: AC electrical characteristics + 2 5.0 V 10%, unless otherwise specified. amb CC Symbol Parameter clock pulse duration ...
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Philips Semiconductors 10.1 Timing diagrams A0– CSx t 13d IOW D0–D7 Fig 5. General write timing. A0– CSx t 7d IOR D0–D7 Fig 6. General read timing. 9397 750 11634 Product data Dual UART with 32 ...
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Philips Semiconductors IOW ACTIVE RTS CHANGE OF STATE DTR CD CTS DSR INT IOR RI Fig 7. Modem input/output timing EXTERNAL CLOCK Fig 8. External clock timing. 9397 750 11634 Product data Dual UART with 32 bytes of ...
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Philips Semiconductors START BIT RX INT IOR Fig 9. Receive timing. START BIT RX RXRDY IOR Fig 10. Receive ready timing in non-FIFO mode. 9397 750 11634 Product data Dual UART with 32 bytes of transmit and receive FIFOs DATA ...
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Philips Semiconductors START BIT RX RXRDY IOR Fig 11. Receive ready timing in FIFO mode. START BIT TX INT t 23d ACTIVE IOW Fig 12. Transmit timing. 9397 750 11634 Product data Dual UART with 32 bytes of transmit and ...
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Philips Semiconductors START BIT TX ACTIVE IOW D0–D7 BYTE #1 t 27d TXRDY Fig 13. Transmit ready timing in non-FIFO mode. 9397 750 11634 Product data Dual UART with 32 bytes of transmit and receive FIFOs DATA BITS (5-8) D0 ...
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Philips Semiconductors START BIT TX ACTIVE IOW D0–D7 BYTE #32 t 27d TXRDY Fig 14. Transmit ready timing in FIFO mode (DMA mode ‘1’). 9397 750 11634 Product data Dual UART with 32 bytes of transmit and receive FIFOs DATA ...
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Philips Semiconductors 11. Package outline LQFP48: plastic low profile quad flat package; 48 leads; body 1 pin 1 index DIMENSIONS (mm are the ...
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Philips Semiconductors 12. Soldering 12.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...
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Philips Semiconductors • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be – smaller than 1.27 mm, the footprint longitudinal axis must ...
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Philips Semiconductors [3] These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C oven. ...
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Philips Semiconductors 14. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...
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Philips Semiconductors Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . ...