ISD5008SY Nuvoton Technology Corporation of America, ISD5008SY Datasheet - Page 19

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ISD5008SY

Manufacturer Part Number
ISD5008SY
Description
IC VOICE REC/PLAY 4-8MIN 28-SOIC
Manufacturer
Nuvoton Technology Corporation of America
Series
ISD5008r
Datasheet

Specifications of ISD5008SY

Interface
SPI/Microwire
Filter Pass Band
1.7 ~ 3.4kHz
Duration
4 ~ 8 Min
Mounting Type
Surface Mount
Package / Case
28-SOIC (0.300", 7.50mm Width)
For Use With
ISD-ES511 - EVALUATION SYSTEM FOR ISD5100ISD-ES501 - EVALUATION SYSTEM FOR ISD5008
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
6.4
The ISD5008 product operates from a SPI serial interface, which operates with the following protocol:
The data transfer protocol assumes that the microcontroller’s SPI shift registers are clocked on the
falling edge of the SCLK. However, for the ISD5008, data is clocked into the MOSI pin at the rising
clock edge, while data is clocked out onto the MISO pin at the falling clock edge.
6.4.1
Message cueing allows the user to skip through messages, without knowing the actual physical
location of the message. This operation is used during playback. In this mode, the messages are
skipped 1600 times faster than in normal playback mode. It will stop when an EOM marker is reached.
Then, the internal address counter will point to the next message.
1. All serial data transfers begin with the falling edge of SS pin.
2. SS is held LOW during all serial communications and held HIGH between instructions.
3. Data is clocked in on the rising clock edge and data is clocked out on the falling clock edge.
4. Play and Record operations are initiated by enabling the device by asserting the SS pin LOW,
5. The opcodes and address fields are as follows: <8 control bits> and <16 address bits>.
6. Each operation that ends in an EOM or Overflow will generate an interrupt, including the
7. As Interrupt data is shifted out of the ISD5008 MISO pin, control and address data is
8. A record or playback operation begins with the RUN bit set and the operation ends with the
9. All operations begin with the rising edge of SS.
S
shifting in an opcode and an address field to the ISD5008 device (refer to the Opcode
Summary of Table 6).
Message Cueing cycles. The Interrupt will be cleared the next time an SPI cycle is completed.
simultaneously being shifted into the MOSI pin. Care should be taken such that the data
shifted in is compatible with current system operation. It is possible to read interrupt data and
start a new operation within the same SPI cycle.
RUN bit reset.
Message Cuing
ERIAL
P
ERIPHERAL
I
NTERFACE
(SPI) D
ESCRIPTION
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Publication Release Date: Oct 31 2008
ISD5008
Revision 1.2

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