EN29F040-70TI EON, EN29F040-70TI Datasheet
EN29F040-70TI
Related parts for EN29F040-70TI
EN29F040-70TI Summary of contents
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... WAIT states in high-performance microprocessor systems. The EN29F040 has separate Output Enable ( OE ), Chip Enable ( CE ), and Write Enable ( controls, which eliminate bus contention issues. This device is designed to allow either single (or multiple) Sector or full chip erase operation, where each Sector can be individually protected against program/erase operations or temporarily unprotected to erase or program ...
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... FIGURE 1. LOGIC DIAGRAM A18 SIZE (Kbytes) A18 Rev. D, Issue Date: 2001/07/05 EN29F040 Vcc 8 DQ0 - DQ7 EN29F040 Vss A17 A16 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Great America Parkway, Suite 202 Santa Clara, CA 95054 Block Protect Switches Erase Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer X-Decoder 3 Rev. D, Issue Date: 2001/07/05 EN29F040 DQ0-DQ7 Input/Output Buffers STB Data Latch Y-Gating Cell Matrix Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Great America Parkway, Suite 202 Santa Clara, CA 95054 FIGURE 2. PDIP FIGURE 3. PLCC FIGURE 4. TSOP 4 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... VID L VID X L VID VID VID X H VID 0. Rev. D, Issue Date: 2001/07/05 EN29F040 Ax Ax MANUFACTURE DEVICE ID (T/ ...
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... USER MODE DEFINITIONS Standby Mode The EN29F040 has a CMOS-compatible standby mode, which reduces the current placed in CMOS-compatible standby when the TTL-compatible standby mode, which reduces the maximum V TTL-compatible standby when the high-impedance state independent of the Read Mode The device is automatically set to reading array data after device power-up. No commands are required to retrieve data ...
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... Only erase operations can convert a “0” “1”. COMMAND DEFINITIONS The operations of the EN29F040 are selected by one or more commands written into the command register to perform Read/Reset Memory, Read ID, Read Sector Protection, Program, Sector Erase, Chip Erase, Erase Suspend and Erase Resume ...
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... whichever is last; data is latched on the rising edge The program operation is completed when EN29F040 returns the equivalent data to the programmed location. Programming status may be checked by sampling data on DQ7 ( DATA polling DQ6 (toggle bit). Changing data from requires an erase operation. When programming time limit is exceeded, DQ5 will produce a logical “ ...
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... The system can determine the status of the program operation using the DQ7 or DQ6 status bits, just as in the standard program operation. See “Write Operation Status” for more information. 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 9 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Sector protection/unprotection must be implemented using programming equipment. The procedure re- quires a high voltage ( address pin A9 and the control pins additional supplement on this feature. 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Contact Eon Silicon Devices, Inc. for 10 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Figure 8. DQ6 Toggle Bit I The EN29F040 provides a “Toggle Bit” on DQ6 to indicate to the host system the status of the embedded programming and erase operations. (See Table 6) During an embedded Program or Erase operation, successive attempts to read data from the device at any address (by toggling will result in DQ6 toggling between “zero” and “one”. Once the embedded Program or Erase operation is complete, DQ6 will stop toggling and valid data will be read on the next successive attempts ...
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... Great America Parkway, Suite 202 Santa Clara, CA 95054 The Toggle Bit (DQ6) should also be checked at this 12 Rev. D, Issue Date: 2001/07/05 EN29F040 . DATA Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Program or Erase On-going Chip Erase, Erase or Erase suspend on currently addressed Sector. (When DQ5=1, Erase Error due to currently addressed Sector. Program during Erase Suspend on-going at current address Erase Suspend read on DQ2 non Erase Suspend Sector 13 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... IH the EN20F040 locks out write cycles to protect against any , , the command register is disabled and all internal program or 14 Rev. D, Issue Date: 2001/07/05 EN29F040 must be a logical W E Tel: 408-235-8680 Fax: 408-235-8685 ...
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... See the Command Definitions section for more information. 555H / AAH 2AAH / 55H 555H / A0H PROGRAM ADDRESS / PROGRAM DATA 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 START Write Program (shown below) Data Poll Device Last Address? Yes 15 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Flowchart 3. Embedded Erase START Write Erase Command Sequence (shown below) Data Polling Device or Toggle Bit Successfully Completed ERASE Done 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 16 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... See the Command Definitions section for more information. Chip Erase 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H 555H/10H 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Sector Erase 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H Sector Address/30H 17 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Flowchart 5. DATA Polling Algorithm Start Read Data DQ7 = Data DQ5 = 1? Yes Read Data DQ7 = Data? No Fail 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Yes Yes Pass 18 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Flowchart 6. Toggle Bit Algorithm Start Read Data DQ6 = Toggle? Yes No DQ5 = 1? Yes Read Data DQ6 = Toggle? Yes Fail 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 No No Pass 19 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Operating ranges define those limits between which the functionality of the device is guaranteed. Maximum Negative Overshoot Waveform 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 + 0.5 V. During voltage transitions, input and I/O CC Maximum Positive Overshoot Waveform 20 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... OUT 6MHz Vcc ± 0.3V Byte program, Sector or Chip Erase in progress -2 -100 µ Rev. D, Issue Date: 2001/07/05 EN29F040 Min Max Unit ±5 µA ±5 µ 1.0 MA 5.0 µ -0.5 0.8 V Vcc + 2 V 0.5 0.45 V 2.4 ...
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... Great America Parkway, Suite 202 Santa Clara, CA 95054 Test Setup Min Max Max Max Max Max Min Rev. D, Issue Date: 2001/07/05 EN29F040 Speed Options -45 -55 -70 -90 Unit ...
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... Min 10 Polling DATA Min 0 Min 0 Min 0 Min 25 Min 20 Typ 7 Max 200 Typ 0.3 Max 5 Typ 3 Max 35 Min 50 Min 500 ID 23 Rev. D, Issue Date: 2001/07/05 EN29F040 Speed Options -55 -70 -90 Unit ...
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... Data Polling Min 0 Min 0 Min 0 Min 25 Min 20 Typ 7 Max 200 Typ 0.3 Max 5 Typ 3 Max 35 Min 50 Min 500 ID 24 Rev. D, Issue Date: 2001/07/05 EN29F040 Speed Options -55 -70 -90 Unit ...
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... OUT Test Setup Typ OUT 8 7.5 25 Rev. D, Issue Date: 2001/07/05 EN29F040 Comments erasure Excludes system level overhead Min Max 12.0 V Vcc + 1.0 V 100 mA Max Unit Max Unit 7 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Table 15. DATA RETENTION Parameter Description Minimum Pattern Data Retention Time 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Test Conditions 150°C 125°C 26 Rev. D, Issue Date: 2001/07/05 EN29F040 Min Unit 10 Years 20 Years Tel: 408-235-8680 Fax: 408-235-8685 ...
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... SWITCHING WAVEFORMS Figure 5. AC Waveforms for READ Operations Figure 6. AC Waveforms for Chip/Sector Erase Operations Notes the Sector address for Sector erase. 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 27 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... D is the output of data written to the device. OUT 5. Figure indicates last two bus cycles of four bus cycle sequence. 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 28 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Valid Data (The device has completed the embedded operation). 7 Figure 9. AC Waveforms for Toggle Bit During Embedded Algorithm Operations Notes: *DQ stops toggling (The device has completed the embedded operation). 6 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 29 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... D is the output of data written to the device. OUT 5. Figure indicates last two bus cycles of four bus cycle sequence. 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 30 Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Commercial (0°C to +70° Industrial (-40°C to +85°C) PACKAGE Plastic DIP Plastic PLCC Plastic TSOP SPEED 45 = 45ns 55 = 55ns 70 = 70ns 90 = 90ns BASE PART NUMBER EN = EON Silicon Devices 29F = FLASH, 5V 040 = 512K Rev. D, Issue Date: 2001/07/05 EN29F040 Tel: 408-235-8680 Fax: 408-235-8685 ...
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... Chip erase and Sector Erase command descriptions modified. DQ7,DQ5,DQ3 status polling descriptions modified. Table 12 Latchup characteristics modified 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 =11.5 0.5V ID =11.0 0. Rev. D, Issue Date: 2001/07/05 EN29F040 , and OE are all logical zero Tel: 408-235-8680 Fax: 408-235-8685 ...