EN29LV800BB-70TCP Eon Silicon Solution Inc., EN29LV800BB-70TCP Datasheet

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EN29LV800BB-70TCP

Manufacturer Part Number
EN29LV800BB-70TCP
Description
Manufacturer
Eon Silicon Solution Inc.
Datasheet

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EN29LV800BB-70TCP,,10,TSOP,EON
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GENERAL DESCRIPTION
The EN29LV800B is an 8-Megabit, electrically erasable, read/write non-volatile flash memory,
organized as 1,048,576 bytes or 524,288 words. Any byte can be programmed typically in 8µs. The
EN29LV800B features 3.0V voltage read and write operation, with access time as fast as 55ns to
eliminate the need for WAIT statements in high-performance microprocessor systems.
The EN29LV800B has separate Output Enable (OE#), Chip Enable (CE#), and Write Enable (WE#)
controls, which eliminate bus contention issues. This device is designed to allow either single Sector
or full chip erase operation, where each sector can be individually protected against program/erase
operations or temporarily unprotected to erase or program. The device can sustain a minimum of
100K program/erase cycles on each sector.
• Single power supply operation
- Full voltage range: 2.7-3.6 volt read and write
- Regulated voltage range: 3.0-3.6 volt read
• High performance
- Access times as fast as 55 ns
• Low power consumption (typical values at 5
- 7 mA typical active read current
- 15 mA typical program/erase current
- 1 μA typical standby current (standard access
• Flexible Sector Architecture:
- One 16-Kbyte, two 8-Kbyte, one 32-Kbyte,
- One 8-Kword, two 4-Kword, one 16-Kword
• High performance program/erase speed
- Byte/Word program time: 8µs typical
- Sector erase time: 500ms typical
EN29LV800B
8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory
Boot Sector Flash Memory, CMOS 3.0 Volt-only
operations for battery-powered applications.
and write operations and for compatibility with
high performance 3.3 volt microprocessors.
MHz)
time to active mode)
and fifteen 64-Kbyte sectors (byte mode)
and fifteen 32-Kword sectors (word mode)
FEATURES
This Data Sheet may be revised by subsequent versions
or modifications due to changes in technical specifications.
Rev. H, Issue Date: 2008/07/07
1
• Sector protection:
- Hardware locking of sectors to prevent
- Additionally, temporary Sector Unprotect
• JEDEC Standard Embedded Erase and
• JEDEC standard DATA# polling and toggle
• Single Sector and Chip Erase
• Sector Unprotect Mode
• Erase Suspend / Resume modes:
• Low Vcc write inhibit < 2.5V
• Minimum 100K endurance cycle
• Package Options
- 48-pin TSOP (Type 1)
- 48-ball 6mm x 8mm TFBGA
• Commercial and industrial temperature
Read or program another Sector during
Erase Suspend Mode
Program Algorithms
bits feature
allows code changes in previously locked
sectors.
Range
program or erase operations within individual
sectors
©2004 Eon Silicon Solution, Inc., www.essi.com.tw
EN29LV800B

EN29LV800BB-70TCP Summary of contents

Page 1

EN29LV800B 8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory Boot Sector Flash Memory, CMOS 3.0 Volt-only FEATURES • Single power supply operation - Full voltage range: 2.7-3.6 volt read and write operations for battery-powered applications. - Regulated ...

Page 2

CONNECTION DIAGRAMS A15 1 A14 2 A13 3 A12 4 A11 5 A10 WE# 11 RESET RY/BY# 15 A18 16 A17 ...

Page 3

TABLE 1. PIN DESCRIPTION Pin Name Function A0-A18 Addresses DQ0-DQ14 15 Data Inputs/Outputs DQ15 (data input/output, word mode), DQ15 / A-1 A-1 (LSB address input, byte mode) CE# Chip Enable OE# Output Enable RESET# Hardware Reset Pin RY/BY# Ready/Busy Output ...

Page 4

TABLE 2A. TOP BOOT BLOCK SECTOR ARCHITECTURE ADDRESS RANGE Sector (X16) 18 7E000h-7FFFFh FC000h-FFFFFh 17 7D000h-7DFFFh FA000h-FBFFFh 16 7C000h-7CFFFh F8000h-F9FFFh 15 78000h-7BFFFh F0000h – F7FFFh 14 70000h-77FFFh E0000h - EFFFFh 13 68000h-6FFFFh D0000h - DFFFFh 12 60000h-6FFFFh C0000h - CFFFFh ...

Page 5

TABLE 2B. BOTTOM BOOT BLOCK SECTOR ARCHITECTURE ADDRESS RANGE Sector (X16) 18 78000h-7FFFFh F0000h – FFFFFh 17 70000h-77FFFh E0000h – EFFFFh 16 68000h-6FFFFh D0000h – DFFFFh 15 60000h-67FFFh C0000h – CFFFFh 14 58000h-5FFFFh B0000h - BFFFFh 13 50000h-57FFFh A0000h - ...

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PRODUCT SELECTOR GUIDE Product Number Regulated Voltage Range: Vcc=3.0 – 3.6 V Speed Option Full Voltage Range: Vcc=2.7 – 3 Max Access Time acc t Max CE# Access Max OE# ...

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TABLE 3. OPERATING MODES Operation CE# Read L Write L ± 0.3V CMOS Standby V cc TTL Standby H Output Disable L Hardware Reset X Temporary Sector Unprotect X Notes: L=logic low H=Logic High ...

Page 8

USER MODE DEFINITIONS Word / Byte Configuration The signal set on the BYTE# Pin controls whether the device data I/O pins DQ15-DQ0 operate in the byte or word configuration. When the Byte# Pin is set at logic ‘1’, then the ...

Page 9

To access the autoselect codes in-system; the host system can issue the autoselect command via the command register, as shown in the Command Definitions table. This method does not require V . See “Command Definitions” for details on using the ...

Page 10

Automatic Sleep Mode The automatic sleep mode minimizes Flash device energy consumption. The device automatically enables this mode when addresses remain stable for t independent of the CE#, WE# and OE# control signals. Standard address access timings provide new data ...

Page 11

COMMAND DEFINITIONS The operations of EN29LV800B are selected by one or more commands written into the command register to perform Read/Reset Memory, Read ID, Read Sector Protection, Program, Sector Erase, Chip Erase, Erase Suspend and Erase Resume. Commands are made ...

Page 12

Reset Command Writing the reset command to the device resets the device to reading array data. Address bits are don’t-care for this command. The reset command may be written between the sequence cycles in an erase command sequence before erasing ...

Page 13

Chip Erase Command Chip erase is a six-bus-cycle operation. The chip erase command sequence is initiated by writing two unlock cycles, followed by a set-up command. Two additional unlock write cycles are then followed by the chip erase command, which ...

Page 14

After an erase-suspended program operation is complete, the system can once again read array data within non-suspended sectors. The system can determine the status of the program operation using the DQ7 or DQ6 status bits, just as in the standard ...

Page 15

DQ6: Toggle Bit I The EN29LV800B provides a “Toggle Bit” on DQ6 to indicate to the host system the status of the embedded programming and erase operations. (See Table 6) During an embedded Program or Erase operation, successive attempts to ...

Page 16

Flowchart 6 shows the toggle bit algorithm, and the section “DQ2: Toggle Bit” explains the algorithm. See also the “DQ6: Toggle Bit I” subsection. Refer to the Toggle Bit Timings figure for the toggle bit timing diagram. The DQ2 vs. ...

Page 17

Table 6. Status Register Bits DQ Name DATA# 7 POLLING TOGGLE 6 BIT 5 ERROR BIT ERASE 3 TIME BIT TOGGLE 2 BIT Notes: DQ7 DATA# Polling: indicates the P/E C status check during Program or Erase, and on completion ...

Page 18

EMBEDDED ALGORITHMS Flowchart 1. Embedded Program Increment Address Flowchart 2. Embedded Program Command Sequence See the Command Definitions section for more information on WORD mode. PROGRAM ADDRESS / PROGRAM DATA This Data Sheet may be revised by subsequent versions or ...

Page 19

Flowchart 3. Embedded Erase START Write Erase Command Sequence Data Poll from System or Toggle Bit successfully completed Data =FFh? No Erase Done Flowchart 4. Embedded Erase Command Sequence See the Command Definitions section for more information on WORD mode. ...

Page 20

Flowchart 5. DATA# Polling Algorithm Notes: (1) This second read is necessary in case the first read was done at the exact instant when the status data was in transition. Flowchart 6. Toggle Bit Algorithm Notes: (2) This second set ...

Page 21

Flowchart 7a. In-System Sector Protect Flowchart Temporary Sector Unprotect Mode Increment PLSCNT PLSCNT = 25? Device failed Sector Protect Algorithm This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. START PLSCNT = ...

Page 22

Flowchart 7b. In-System Sector Unprotect Flowchart Protect all sectors: The indicated portion of the sector protect algorithm must be performed for all unprotected sectors prior to issuing the first sector unprotect address (see Diagram 7a.) Increment PLSCNT No PLSCNT = ...

Page 23

Table 7. DC Characteristics (T = 0°C to 70° 40°C to 85° Symbol Parameter Input Leakage Current I LI Output Leakage Current I LO Supply Current (read) TTL (read) CMOS Byte I CC1 (read) CMOS ...

Page 24

Test Conditions Device Under Test C L Note: Diodes are IN3064 or equivalent Test Specifications Test Conditions Output Load Output Load Capacitance, C Input Rise and Fall times Input Pulse Levels Input timing measurement reference levels Output timing measurement reference ...

Page 25

AC CHARACTERISTICS Hardware Reset (Reset 0°C to 70° 40°C to 85° Parameter Description Std Reset# Pin Low to Read or Write t READY Embedded Algorithms Reset# Pin Low to Read or Write t ...

Page 26

AC CHARACTERISTICS Word / Byte Configuration (Byte 0°C to 70° 40°C to 85° Std Parameter Description t Byte# to CE# switching setup time BCS t CE# to Byte# switching hold time CBH t ...

Page 27

Table 8. AC CHARACTERISTICS (T = 0°C to 70° 40°C to 85° Read-only Operations Characteristics Parameter Symbols JEDEC Standard Description t t Read Cycle Time AVAV Address to Output Delay AVQV ACC ...

Page 28

Table 9. AC CHARACTERISTICS (T = 0°C to 70° 40°C to 85° Write (Erase/Program) Operations Parameter Symbols Description JEDEC Standard t t Write Cycle Time AVAV Address Setup Time AVWL AS t ...

Page 29

Table 10. AC CHARACTERISTICS (T = 0°C to 70° 40°C to 85° Write (Erase/Program) Operations Alternate CE# Controlled Writes Parameter Symbols JEDEC Standard Description t t Write Cycle Time AVAV Address Setup ...

Page 30

Table 11. ERASE AND PROGRAMMING PERFORMANCE Parameter Sector Erase Time Chip Erase Time Byte Programming Time Word Programming Time Byte Chip Programming Time Word Erase/Program Endurance Table 12. LATCH UP CHARACTERISTICS Parameter Description Input voltage with respect ...

Page 31

AC CHARACTERISTICS Figure 6. AC Waveforms for Chip/Sector Erase Operations Timings Erase Command Sequence (last 2 cycles Addresses 0x2AA CE# t GHWL OE WE Data 0x55 t DS RY/BY VCS ...

Page 32

Figure 7. Program Operation Timings Program Command Sequence (last 2 cycles Addresses 0x555 CE# t GHWL OE WE Data OxA0 t DS RY/BY# t VCS V CC Notes: 1. PA=Program Address, PD=Program ...

Page 33

Figure 8. AC Waveforms for /DATA Polling During Embedded Algorithm Operations t RC Addresses VA t ACC CE OE# t OEH WE# DQ[7] DQ[6:0] t BUS RY/BY# Notes: 1. VA=Valid Address for reading Data# ...

Page 34

Figure 10. Alternate CE# Controlled Write Operation Timings 0x555 for Program 0x2AA for Erase Addresses t WC WE# t GHEL OE CE Data 0xA0 for Program RY/BY Reset# Notes address ...

Page 35

Figure 12. Sector Protect/Unprotect Timing Diagram V ID Vcc RESET VIDR SA, A6,A1,A0 Data 60h Sector Protect/Unprotect CE# WE# >1μS OE# Notes: Use standard microprocessor timings for this device for read and write cycles. For Sector Protect, use ...

Page 36

FIGURE 14. TSOP 12mm x 20mm This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. ©2004 Eon Silicon Solution, Inc., www.essi.com.tw 36 Rev. H, Issue Date: 2008/07/07 EN29LV800B ...

Page 37

This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. ©2004 Eon Silicon Solution, Inc., www.essi.com.tw 37 Rev. H, Issue Date: 2008/07/07 EN29LV800B ...

Page 38

FIGURE 15. 48 TFBGA package outline This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. SYMBOL MIN 0.23 A2 0.84 D 7. ...

Page 39

ABSOLUTE MAXIMUM RATINGS Parameter Storage Temperature Plastic Packages Ambient Temperature With Power Applied Output Short Circuit Current A9, OE#, Reset# Voltage with Respect to Ground Notes more than one output shorted at a time. Duration of the short ...

Page 40

... BOOT CODE SECTOR ARCHITECTURE T = Top Sector B = Bottom Sector BASE PART NUMBER EN = EON Silicon Solution Inc. 29LV = FLASH, 3V Read Program Erase 800 = 8 Megabit (1024K 512K x 16 version identifier ©2004 Eon Silicon Solution, Inc., www.essi.com.tw 40 Rev. H, Issue Date: 2008/07/07 ...

Page 41

Revisions List Revision No Description A Preliminary draft B Initial Release C 1. Update Eon logo 2. Dimension N corrected on page 37. D Make a note on the tables at page 25 to page 30 regarding to the test ...

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