EN29LV800 EON [Eon Silicon Solution Inc.], EN29LV800 Datasheet

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EN29LV800

Manufacturer Part Number
EN29LV800
Description
8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory Boot Sector Flash Memory, CMOS 3.0 Volt-only
Manufacturer
EON [Eon Silicon Solution Inc.]
Datasheet

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GENERAL DESCRIPTION
The EN29LV800 is an 8-Megabit, electrically erasable, read/write non-volatile flash memory,
organized as 1,048,576 bytes or 524,288 words. Any byte can be programmed typically in 10µs.
The EN29LV800 features 3.0V voltage read and write operation, with access times as fast as 55ns to
eliminate the need for WAIT states in high-performance microprocessor systems.
The EN29LV800 has separate Output Enable ( OE ), Chip Enable ( CE ), and Write Enable (WE)
controls, which eliminate bus contention issues. This device is designed to allow either single Sector
or full chip erase operation, where each Sector can be individually protected against program/erase
operations or temporarily unprotected to erase or program. The device can sustain a minimum of
100K program/erase cycles on each Sector.
- Full voltage range: 2.7-3.6 volt read and write
- Regulated voltage range: 3.0-3.6 volt read
- Access times as fast as 70 ns
- 7 mA typical active read current
- 15 mA typical program/erase current
- 1 A typical standby current (standard access
- One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
- One 8 Kword, two 4 Kword, one 16 Kword
- Supports full chip erase
- Individual sector erase supported
- Sector protection:
EN29LV800
8 Megabit (1024K x 8-bit / 512K x 16-bit) Flash Memory
Boot Sector Flash Memory, CMOS 3.0 Volt-only
operations for battery-powered applications.
and write operations and for compatibility with
high performance 3.3 volt microprocessors.
time to active mode)
fifteen 64 Kbyte sectors (byte mode)
and fifteen 32 Kword sectors (word mode)
Manufactured on 0.28 µm process technology
High performance
Single power supply operation
Low power consumption (typical values at 5
MHz)
Flexible Sector Architecture:
Hardware locking of sectors to prevent
program or erase operations within individual
sectors
da0.
FEATURES
4800 Great America Parkway, Suite 202
Santa Clara, CA 95054
Rev 0.4 Release Date: 2002/01/29
1
- Byte/Word program time: 8µs typical
- Sector erase time: 500ms typical
Additionally, temporary Sector Group
Read or program another Sector during
Erase Suspend Mode
Unprotect allows code changes in previously
locked sectors.
High performance program/erase speed
JEDEC Standard program and erase
commands
JEDEC standard DATA polling and toggle
bits feature
Single Sector and Chip Erase
Sector Unprotect Mode
Embedded Erase and Program Algorithms
Erase Suspend / Resume modes:
0.28 µm double-metal double-poly
triple-well CMOS Flash Technology
Low Vcc write inhibit < 2.5V
>100K program/erase endurance cycle
48-pin TSOP (Type 1)
Commercial Temperature Range
EN29LV800
Tel: 408-235-8680
Fax: 408-235-8685

Related parts for EN29LV800

EN29LV800 Summary of contents

Page 1

... The EN29LV800 features 3.0V voltage read and write operation, with access times as fast as 55ns to eliminate the need for WAIT states in high-performance microprocessor systems. The EN29LV800 has separate Output Enable ( OE ), Chip Enable ( CE ), and Write Enable (WE) controls, which eliminate bus contention issues. This device is designed to allow either single Sector or full chip erase operation, where each Sector can be individually protected against program/erase operations or temporarily unprotected to erase or program ...

Page 2

... Vss Ground NC Not Connected to anything BYTE# Byte/Word Mode 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 Standard TSOP FIGURE 1. LOGIC DIAGRAM EN29LV800 A0 - A18 Reset Byte 2 EN29LV800 48 A16 47 BYTE# 46 Vss 45 DQ15/A-1 44 DQ7 43 DQ14 42 DQ6 41 DQ13 40 DQ5 39 ...

Page 3

... EN29LV800 A16 A15 A14 A13 A12 ...

Page 4

... EN29LV800 A16 A15 A14 A13 A12 ...

Page 5

... Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 -70R Block Protect Switches Erase Voltage Generator Chip Enable Output Enable Logic Y-Decoder STB Timer X-Decoder 5 EN29LV800 EN29LV800 - DQ0-DQ15 (A-1) Input/Output Buffers STB Data Latch Y-Gating Cell Matrix Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 6

... Vcc (CMOS logic level) for Command Autoselect Mode. 6 EN29LV800 DQ8-DQ15 Byte# Byte# DQ0-DQ7 = High-Z OUT OUT D D High High-Z High-Z High-Z High-Z High-Z High-Z High-Z ...

Page 7

... DQ15 pin is used as an input for the LSB (A-1) address function. Standby Mode The EN29LV800 has a CMOS-compatible standby mode, which reduces the current to (typical placed in CMOS-compatible standby when the BYTE# pin must also be at CMOS input levels. The device also has a TTL-compatible standby mode, which reduces the maximum V current to < ...

Page 8

... When doing Sector Unprotect, all the other sectors should be protected first. The second method is meant for programming equipment. This method requires V both OE# and A9 pin and non-standard microprocessor timings are used. This method is described in a separate document called EN29LV800 Supplement, which can be obtained by contacting a representative of Eon Silicon Devices, Inc. Temporary Sector Unprotect This feature allows temporary unprotection of previously protected sector groups to change data while in-system ...

Page 9

... While in sleep mode, output is latched and always available to the system. ICC in the DC Characteristics table represents the automatic sleep more 4 current specification. 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 EN29LV800 + 30ns. The automatic sleep mode is acc 9 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 10

... W E 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 do not initiate a write cycle the device will not accept commands on the rising edge EN29LV800 . The LKO = VIH. To initiate and Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 11

... COMMAND DEFINITIONS The operations of the EN29LV800 are selected by one or more commands written into the command register to perform Read/Reset Memory, Read ID, Read Sector Protection, Program, Sector Erase, Chip Erase, Erase Suspend and Erase Resume. Commands are made up of data sequences written at specific addresses via the command register. ...

Page 12

... Word / Byte Programming Command The device may be programmed by byte or by word, depending on the state of the Byte# Pin. Programming the EN29LV800 is performed by using a four bus-cycle operation (two unlock write cycles followed by the Program Setup command and Program Data Write cycle). When the program command is executed, no additional CPU controls or timings are necessary ...

Page 13

... DQ7 or DQ6 status bits, just as in the standard program operation. See “Write Operation Status” for more information. The Autoselect command is not supported during Erase Suspend Mode. 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 EN29LV800 13 Tel: 408-235-8680 Fax: 408-235-8685 not require ...

Page 14

... Erase Suspend mode the standby mode. DQ6: Toggle Bit I The EN29LV800 provides a “Toggle Bit” on DQ6 to indicate to the host system the status of the embedded programming and erase operations. (See Table 6) 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0 ...

Page 15

... Toggle Bit I” subsection. Refer to the Toggle Bit Timings figure for the toggle bit timing diagram. The DQ2 vs. DQ6 figure shows the differences between DQ2 and DQ6 in graphical form. 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 pulse EN29LV800 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 16

... Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 DQ7 DQ6 DQ5 DQ3 DQ7# Toggle 0 N/A 0 Toggle N/A Toggle Data Data Data Data DQ7# Toggle 0 N/A 16 EN29LV800 RY/BY DQ2 # No 0 toggle Toggle 0 Toggle 1 Data 1 N/A 0 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 17

... Erase timeout period on-going Chip Erase, Erase or Erase suspend on currently addressed Sector. (When DQ5=1, Erase Error due to currently addressed Sector. Program during Erase Suspend on- going at current address Erase Suspend read on DQ2 non Erase Suspend Sector 17 EN29LV800 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 18

... AAH 2AAH / 55H 555H / A0H PROGRAM ADDRESS / PROGRAM DATA 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 START Write Program (shown below) Data Poll Device Verify Data? Last Address? Yes 18 EN29LV800 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 19

... Flowchart 3. Embedded Erase START Write Erase Command Sequence Data Poll from System or Toggle Bit successfully completed Data =FFh? No Erase Done 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 Yes 19 EN29LV800 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 20

... See the Command Definitions section for more information on WORD mode. Chip Erase 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H 555H/10H 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 EN29LV800 Sector Erase 555H/AAH 2AAH/55H 555H/80H 555H/AAH 2AAH/55H Sector Address/30H 20 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 21

... This second set of reads is necessary in case the first set of reads was done at the exact instant when the status data was in transition. 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 EN29LV800 Start Read Data DQ7 = Data ...

Page 22

... Write 40h to sector address with Wait 0.4 s Read from sector address with Data = 01h? Yes Yes Yes Protect another sector? No Remove V ID from RESET# Write reset command Sector Protect complete 22 EN29LV800 Reset PLSCNT = 1 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 23

... Wait 0.4 S Read from sector address with Set up next sector Data = 00h? address Yes No Last sector verified? Yes Remove V from Write reset ID RESET# command 23 Rev 0.4 Release Date: 2002/01/29 EN29LV800 Sector Unprotect complete Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 24

... RESET# = Vcc ± 0.3V (Note 1) Byte program, Sector or Chip Erase in progress V = Vcc ± 0 Vss ± 0 -0.5 0.7 x Vcc Vcc Vcc - I = -100 A, OH 0.4V 10 2.3 24 EN29LV800 Max Unit Typ ±5 µA ±5 µ 0.4 1 5.0 µ 5.0 µA 0.8 V Vcc ± ...

Page 25

... Input Pulse Levels Input timing measurement reference levels Output timing measurement reference levels 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 3.3 V 2.7 k 6.2 k -55 -70 -90 1 TTL Gate 30 100 100 5 5 0.0-3.0 0.0-3.0 0.0-3.0 1.5 1.5 1.5 1.5 1.5 1.5 25 EN29LV800 Unit Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 26

... RP Reset Timings During Automatic Algorithms 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 Speed options Test Setup -70R Max Max Min Min READY EN29LV800 Unit - 500 nS 500 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 27

... Byte timings for Write Operations Note: Switching BYTE# pin not allowed during embedded operations 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 -70R Min Min Min t BCS t RBH BCS 27 EN29LV800 Speed Unit - CBH ...

Page 28

... Max Max Max Max Max Min Addresses Stable t ACC Output Valid 28 EN29LV800 Speed Options -70R -90 Unit HIGH Z Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 29

... Min 0 Min 0 MIn 0 Read Toggle and Min 10 Polling DATA Min 0 Min 0 Min 0 Min 35 Min 20 Typ 8 Max 200 Typ 0.5 Min 50 Min 500 ID 29 EN29LV800 -90 Unit µs 200 µs 0 µ ...

Page 30

... Min 0 Min Read Toggle and 10 10 Data Polling Min 0 Min 0 Min 0 Min 35 Min 20 Typ 8 Max 200 Typ 0.5 Min 50 Min 500 ID 30 EN29LV800 Speed Options -90 Unit µs 200 µ ...

Page 31

... I/O Pins -1 -100 mA Test Setup OUT Test Conditions 150°C 125°C 31 Rev 0.4 Release Date: 2002/01/29 EN29LV800 Comments Excludes 00H programming prior to erasure Excludes system level overhead Minimum 100K cycles (preliminary) Max 12.0 V Vcc + 1.0 V 100 mA Typ Max Unit 6 7 ...

Page 32

... Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 Read Status Data (last two cycles 0x555 for chip erase WHWH2 WHWH3 0x30 BUSY 32 EN29LV800 VA Status D OUT t RB =true data at read address. out Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 33

... Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 Program Command Sequence (last 2 cycles WHWH1 PD Status t BUSY is the true data at the program address. OUT measurement references. It cannot occur as shown during a valid 33 EN29LV800 PA D OUT t RB Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 34

... Comple- True Complement ment Status Status Data Data Valid Status Valid Status (first read) (second read) 34 Rev 0.4 Release Date: 2002/01/29 EN29LV800 VA Valid Data True Valid Data VA VA Valid Data Valid Status (stops toggling) Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 35

... BUSY DH Status PD for Program 0x30 for Sector Erase 0x10 for Chip Erase Enter Erase Erase Suspend Suspend Program Enter Suspend Read 35 Rev 0.4 Release Date: 2002/01/29 EN29LV800 VA D OUT Erase Resume Enter Erase Erase Erase Suspend Suspend Complete Program Read Tel: 408-235-8680 ...

Page 36

... RESET# Setup Time for Temporary t RSP Sector Unprotect 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Valid 60h Verify Sector Protect: 150 uS Sector Unprotect -70R Min Min 36 Rev 0.4 Release Date: 2002/01/29 EN29LV800 0V t VIDR Valid Valid 40h Status >0.4 S Speed Option Unit -90 500 µ ...

Page 37

... Figure 13. Temporary Sector Unprotect Timing Diagram V ID RESET VIDR CE# WE# t RSP RY/BY# 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 37 Rev 0.4 Release Date: 2002/01/29 EN29LV800 VIDR Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 38

... FIGURE 12. TSOP 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 EN29LV800 38 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 39

... Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 EN29LV800 39 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 40

... Vcc+0.5 Vcc -0.5 to +4.0 + 1.5 V for periods up to 20ns. See figure below Value - Regulated: 3.0 to 3.6 Full: 2.7 to 3.6 Vcc +1.5V Maximum Positive Overshoot 40 EN29LV800 Unit –1.0V for periods Unit C V Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 41

... PACKAGE T = 48-pin TSOP S = Small Outline Package SPEED 70R = 70ns (Regulated 90ns BOOT CODE SECTOR ARCHITECTURE T = Top Sector B = Bottom Sector BASE PART NUMBER EN = EON Silicon Devices 29F = FLASH, 3V Read Program Erase 800 = 8 Megabit (1024K 512 x 16) 41 EN29LV800 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 42

... Table 10 - Program/Erase AC Characteristics. WHWH3 Eliminated the chip-erase time from the Features section. Modified Test Specification Table for Read 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 and updated t and t WHWH2 WHWH1 42 EN29LV800 in Tables WHWH2 Tel: 408-235-8680 Fax: 408-235-8685 ...

Page 43

... Removed –55ns speed option Added ‘Regulated’ functionality statement. Updated all speed tables to reflect changes above. 0.6 (2002.01.29) Updated Ordering information to add packaging type. 4800 Great America Parkway, Suite 202 Santa Clara, CA 95054 Rev 0.4 Release Date: 2002/01/29 EN29LV800 43 Tel: 408-235-8680 Fax: 408-235-8685 ...

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