AT32UC3B0512AU Atmel Corporation, AT32UC3B0512AU Datasheet - Page 353

• Manufacturer Part Number: AT32UC3B0512AU
• Manufacturer: Atmel Corporation

Specifications of AT32UC3B0512AU

• Flash (kbytes): 512 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 60 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 32
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 44
• Ext Interrupts: 44
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 4
• Twi (i2c): 1
• Uart: 3
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 2
• Dac Resolution (bits): 16
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Operating Voltage (vcc): 3.0-3.6 or (1.65-1.95+3.0-3.6)
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 10
• Output Compare Channels: 16
• Input Capture Channels: 6
• Pwm Channels: 13
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

22.3
32059L–AVR32–01/2012
Block Diagram
Table 22-2.
The USBB provides a hardware device to interface a USB link to a data flow stored in a dual-port
RAM (DPRAM).
The USBB requires a 48MHz ± 0.25% reference clock, which is the USB generic clock gener-
ated from one of the power manager oscillators, optionally through one of the power manager
PLLs.
The 48MHz clock is used to generate a 12MHz full-speed (or 1.5 MHz low-speed) bit clock from
the received USB differential data and to transmit data according to full- or low-speed USB
device tolerance. Clock recovery is achieved by a digital phase-locked loop (a DPLL, not repre-
sented), which complies with the USB jitter specifications.
Pipe/Endpoint
4
5
6
Example of Configuration of Pipes/Endpoints Using the Whole DPRAM
Mnemonic
PEP4
PEP5
PEP6
256 bytes
256 bytes
64 bytes
Size
Nb. Banks
2
1
1
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