AT89C51ID2 Atmel Corporation, AT89C51ID2 Datasheet - Page 110

• Manufacturer Part Number: AT89C51ID2
• Manufacturer: Atmel Corporation

Specifications of AT89C51ID2

• Flash (kbytes): 64 Kbytes
• Max. Operating Frequency: 60 MHz
• Cpu: 8051-12C
• Max I/o Pins: 32
• Spi: 1
• Twi (i2c): 1
• Uart: 1
• Sram (kbytes): 2
• Eeprom (bytes): 2048
• Self Program Memory: API
• Operating Voltage (vcc): 2.7 to 5.5
• Timers: 4
• Isp: UART
• Watchdog: Yes

Power-off Flag
4289C–8051–11/05
The power-off flag allows the user to distinguish between a “cold start” reset and a
“warm start” reset.
A cold start reset is the one induced by V
V
power-down.
The power-off flag (POF) is located in PCON register (Table 85). POF is set by hard-
ware when V
software allowing the user to determine the type of reset.
Table 85. PCON Register
PCON - Power Control Register (87h)
Reset Value = 00X1 0000b
Not bit addressable
CC
Number
SMOD1
Bit
is still applied to the device and could be generated for example by an exit from
7
7
6
5
4
3
2
1
0
Mnemonic Description
SMOD0
CC
SMOD1
SMOD0
POF
GF1
GF0
Bit
IDL
PD
6
-
rises from 0 to its nominal voltage. The POF can be set or cleared by
Serial port Mode bit 1
Set to select double baud rate in mode 1, 2 or 3.
Serial port Mode bit 0
Cleared to select SM0 bit in SCON register.
Set to select FE bit in SCON register.
Reserved
The value read from this bit is indeterminate. Do not set this bit.
Power-Off Flag
Cleared to recognize next reset type.
Set by hardware when V
software.
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
General purpose Flag
Cleared by user for general purpose usage.
Set by user for general purpose usage.
Power-Down mode bit
Cleared by hardware when reset occurs.
Set to enter power-down mode.
Idle mode bit
Cleared by hardware when interrupt or reset occurs.
Set to enter idle mode.
5
-
POF
4
CC
CC
rises from 0 to its nominal voltage. Can also be set by
switch-on. A warm start reset occurs while
GF1
3
GF0
2
AT89C51ID2
PD
1
IDL
0
110