ATmega8515 Atmel Corporation, ATmega8515 Datasheet - Page 24
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
ATmega8515
Manufacturer Part Number
ATmega8515
Description
Manufacturer
Atmel Corporation
Specifications of ATmega8515
Flash (kbytes)
8 Kbytes
Pin Count
44
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
35
Ext Interrupts
3
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
3
Input Capture Channels
1
Pwm Channels
3
32khz Rtc
No
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA8515
Manufacturer:
ATMEL
Quantity:
5 510
Company:
Part Number:
ATMEGA8515
Manufacturer:
NS
Quantity:
5 510
Part Number:
ATMEGA8515
Manufacturer:
AT
Quantity:
20 000
Company:
Part Number:
ATmega8515-16AC
Manufacturer:
MOT
Quantity:
3 450
Part Number:
ATmega8515-16AC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATmega8515-16AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATmega8515-16AU
Manufacturer:
ATMEL
Quantity:
4 500
Part Number:
ATmega8515-16AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
ATmega8515-16PU
Manufacturer:
AT
Quantity:
20 000
Preventing EEPROM
Corruption
I/O Memory
24
ATmega8515(L)
During periods of low V
age is too low for the CPU and the EEPROM to operate properly. These issues are the
same as for board level systems using EEPROM, and the same design solutions should
be applied.
An EEPROM data corruption can be caused by two situations when the voltage is too
low. First, a regular write sequence to the EEPROM requires a minimum voltage to
operate correctly. Secondly, the CPU itself can execute instructions incorrectly, if the
supply voltage is too low.
E E P R O M d a t a c o r r u p t i o n c a n e a s i l y b e a v o i d e d b y f o l l o w i n g t h i s d e s i g n
recommendation:
The I/O space definition of the ATmega8515 is shown in “Register Summary” on page
239.
All ATmega8515 I/Os and peripherals are placed in the I/O space. The I/O locations are
accessed by the IN and OUT instructions, transferring data between the 32 general pur-
pose working registers and the I/O space. I/O Registers within the address range $00 -
$1F are directly bit-accessible using the SBI and CBI instructions. In these registers, the
value of single bits can be checked by using the SBIS and SBIC instructions. Refer to
the instruction set section for more details. When using the I/O specific commands IN
and OUT, the I/O addresses $00 - $3F must be used. When addressing I/O Registers as
data space using LD and ST instructions, $20 must be added to these addresses.
For compatibility with future devices, reserved bits should be written to zero if accessed.
Reserved I/O memory addresses should never be written.
Some of the Status Flags are cleared by writing a logical one to them. Note that the CBI
and SBI instructions will operate on all bits in the I/O Register, writing a one back into
any flag read as set, thus clearing the flag. The CBI and SBI instructions work with reg-
isters $00 to $1F only.
The I/O and Peripherals Control Registers are explained in later sections.
Keep the AVR RESET active (low) during periods of insufficient power supply volt-
age. This can be done by enabling the internal Brown-out Detector (BOD). If the
detection level of the internal BOD does not match the needed detection level, an
external low V
write operation is in progress, the write operation will be completed provided that the
power supply voltage is sufficient.
CC
Reset Protection circuit can be used. If a Reset occurs while a
CC
, the EEPROM data can be corrupted because the supply volt-
2512K–AVR–01/10