ATmega8515 Atmel Corporation, ATmega8515 Datasheet - Page 72

• Manufacturer Part Number: ATmega8515
• Manufacturer: Atmel Corporation

Specifications of ATmega8515

• Flash (kbytes): 8 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 35
• Ext Interrupts: 3
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 0.5
• Eeprom (bytes): 512
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 3
• Input Capture Channels: 1
• Pwm Channels: 3
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

Alternate Functions of Port D
72
ATmega8515(L)
The Port D pins with alternate functions are shown in Table 35.
Table 35. Port D Pins Alternate Functions
The alternate pin configuration is as follows:
• RD – Port D, Bit 7
RD is the External Data memory read control strobe.
• WR – Port D, Bit 6
WR is the External Data memory write control strobe.
• OC1A – Port D, Bit 5
OC1A, Output Compare Match A output: The PD5 pin can serve as an external output
for the Timer/Counter1 Output Compare A. The pin has to be configured as an output
(DDD5 set (one)) to serve this function. The OC1A pin is also the output pin for the
PWM mode timer function.
• XCK – Port D, Bit 4
XCK, USART External Clock. The Data Direction Register (DDD4) controls whether the
clock is output (DDD4 set) or input (DDD4 cleared). The XCK pin is active only when
USART operates in Synchronous mode.
• INT1 – Port D, Bit 3
INT1, External Interrupt source 1: The PD3 pin can serve as an external interrupt
source.
• INT0/XCK1 – Port D, Bit 2
INT0, External Interrupt Source 0: The PD2 pin can serve as an external interrupt
source.
XCK1, External Clock. The Data Direction Register (DDD2) controls whether the clock is
output (DDD2 set) or input (DDD2 cleared).
• TXD – Port D, Bit 1
TXD, Transmit Data (Data output pin for USART). When the USART Transmitter is
enabled, this pin is configured as an output regardless of the value of DDD1.
• RXD – Port D, Bit 0
RXD, Receive Data (Data input pin for USART). When the USART Receiver is enabled
this pin is configured as an input regardless of the value of DDD0. When USART forces
this pin to be an input, the pull-up can still be controlled by the PORTD0 bit.
Port Pin
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
Alternate Function
RD (Read Strobe to External Memory)
WR (Write Strobe to External Memory)
OC1A (Timer/Counter1 Output Compare A Match Output)
XCK (USART External Clock Input/Output)
INT1 (External Interrupt 1 Input)
INT0 (External Interrupt 0 Input)
TXD (USART Output Pin)
RXD (USART Input Pin)
2512K–AVR–01/10