ATUC64L4U Atmel Corporation, ATUC64L4U Datasheet - Page 407

• Manufacturer Part Number: ATUC64L4U
• Manufacturer: Atmel Corporation

Specifications of ATUC64L4U

• Flash (kbytes): 64 Kbytes
• Pin Count: 48
• Max. Operating Frequency: 50 MHz
• Cpu: 32-bit AVR
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: Yes
• Max I/o Pins: 36
• Ext Interrupts: 36
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 1
• Twi (i2c): 2
• Uart: 4
• Lin: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 12
• Adc Speed (ksps): 460
• Analog Comparators: 8
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 16
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.62 to 3.6
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: Yes / No
• Timers: 6
• Output Compare Channels: 18
• Input Capture Channels: 12
• Pwm Channels: 35
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

19.6.2
19.6.2.1
19.6.2.2
19.6.2.3
19.6.2.4
32142A–12/2011
Advanced Operation
Peripheral I/O Pin Control
Pull-up Resistor Control
Output Pin Timings
Interrupts
When a GPIO pin is assigned to a peripheral function, i.e. the corresponding bit in GPER is zero,
output and output enable is controlled by the selected peripheral pin. In addition the peripheral
may control some or all of the other GPIO pin functions listed in
ports those features. All pin features not controlled by the selected peripheral is controlled by the
GPIO.
Refer to the Module Configuration section for details regarding implemented GPIO pin functions
and to the Peripheral chapter for details regarding I/O pin function control.
Table 19-1.
Pull-up can be configured for each GPIO pin. Pull-up allows the pin and any connected net to be
pulled up to VDD if the net is not driven.
Pull-up is useful for detecting if a pin is unconnected or if a mechanical button is pressed, for var-
ious communication protocols and to keep unconnected pins from floating.
Pull-up can be enabled and disabled by writing a one and a zero respectively to the correspond-
ing bit in the Pull-up Enable Register (PUER).
Figure 19-3
The same timing applies when performing a ‘set’ or ‘clear’ access, i.e. writing to OVRS or
OVRC. The timing of PVR is also shown.
Figure 19-3. Output Pin Timings
The GPIO can be configured to generate an interrupt when it detects a change on a GPIO pin.
Interrupts on a pin are enabled by writing a one to the corresponding bit in the Interrupt Enable
Function name
Output
Output enable
Pull-up
Write OVR to 1
Write OVR to 0
OVR / I/O Line
CLK_GPIO
PVR
shows the timing of the GPIO pin when writing to the Output Value Register (OVR).
I/O Pin function Control
GPIO mode
OVR
ODER
PUER
PB Access
Peripheral mode
Peripheral
Peripheral
Peripheral if supported, else GPIO
ATUC64/128/256L3/4U
PB Access
Table
19-1, if the peripheral sup-
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