ATxmega16A4 Atmel Corporation, ATxmega16A4 Datasheet - Page 104
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ATxmega16A4
Manufacturer Part Number
ATxmega16A4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega16A4
Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
7
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
3.3
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega16A4U-AU
Manufacturer:
SAMSUNG
Quantity:
514
Part Number:
ATxmega16A4U-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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9.3
9.3.1
9.3.2
9.3.3
9.4
9.4.1
8077H–AVR–12/09
Reset Sequence
Reset Sources
Reset Counter Delay
Oscillator Startup
Oscillator Calibration
Power-On Reset
Reset request from any reset source immediately reset the device, and keep it in reset as long
as the request is active. When all reset requests are released, the device will go through three
stages before the internal reset is released and the device starts running.
If one of the reset request occur during this, the reset sequence will start over again.
The Reset Counter Delay is the programmable period from all reset requests are released and
until the reset counter times out and releases reset. The Reset Counter Delay is timed from the
1 kHz output of the Ultra Low Power (ULP) Internal Oscillator, and the number of cycles before
the timeout is set by the STARTUPTIME fuse bits. The selectable delays are shown in
1.
Table 9-1.
After the Reset Counter Delay, the default clock is started. This is the 2 MHz internal RC oscilla-
tor, and this uses 6 clock cycles to startup and stabilize.
After the default oscillator has stabilized, oscillator calibration values are loaded from Non-Vola-
tile Memory into the Oscillator Calibration registers. Loading the calibration values takes 24
clock cycles on the internal 2 MHz oscillator. The 2 MHz, 32 MHz and 32 kHz internal RC oscil-
lators are calibrated. When this is done the device will enter active mode and program execution
will begin.
A Power-on detection circuit will give a Power-On Reset (POR) when supply voltage (V
applied to the device and the V
Power-on reset is released when the V
Power-on Threshold Voltage (V
When V
lower than the minimum operating voltage for the device, and is only used for power-off function-
SUT[1:0]
• Reset Counter Delay
• Oscillator startup
• Oscillator calibration
00
01
10
11
CC
is falling, the POR will issue a reset when the Vpot level is reached. The Vpot level is
Reset Counter Delay
POT
Number of 1 kHz ULP oscillator clock cycles
CC
) level.
slope is increasing in the Power-on Slope Range (V
CC
stops rising or when the V
Reserved
64
4
0
CC
level has reached the
XMEGA A
Table 9-
POSR
CC
104
) is
).
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