ATxmega16A4 Atmel Corporation, ATxmega16A4 Datasheet - Page 83
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ATxmega16A4
Manufacturer Part Number
ATxmega16A4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega16A4
Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
7
Twi (i2c)
2
Uart
5
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
3.3
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
5
Output Compare Channels
16
Input Capture Channels
16
Pwm Channels
16
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega16A4U-AU
Manufacturer:
SAMSUNG
Quantity:
514
Part Number:
ATxmega16A4U-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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8077H–AVR–12/09
clock or oscillator is used to derive the System Clock (i.e clock reference for the PLL when this is
used as the active system clock) and an clock or oscillator fails (stops), the device will:
If the external oscillator fails when it is not used as the System Clock source, the external oscil-
lator is automatically disabled while the system clock will continue to operate normally.
If the external clock is below 32 kHz then the failure monitor mechanism should not be enabled
in order to avoid unintentional fail detection.
When the failure monitor is enabled, it cannot be disabled until next reset.
The failure monitor is automatically disabled in all sleep modes where the external clock or oscil-
lator is stopped. During wake-up from sleep it is automatically enabled again.
The External Clock Source Failure Monitor setting is protected by the Configuration Change Pro-
tection mechanism, employing a timed write procedure for changing the system clock and
prescaler settings. For details refer to
• Switch to the 2 MHz internal oscillator, independently of any clock system lock setting.
• Reset the Oscillator Control Register and System Clock Selection Register to their default
• Set the External Clock Source Failure Detection Interrupt Flag.
• Issue a non-maskable interrupt (NMI).
values.
”Configuration Change Protection” on page
XMEGA A
12.
83
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