ATxmega16D4 Atmel Corporation, ATxmega16D4 Datasheet - Page 125
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ATxmega16D4
Manufacturer Part Number
ATxmega16D4
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega16D4
Flash (kbytes)
16 Kbytes
Pin Count
44
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Usb Speed
No
Usb Interface
No
Spi
4
Twi (i2c)
2
Uart
2
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
12
Adc Resolution (bits)
12
Adc Speed (ksps)
200
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
14
Input Capture Channels
14
Pwm Channels
14
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega16D4-AU
Manufacturer:
Atmel
Quantity:
438
Part Number:
ATxmega16D4-AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Company:
Part Number:
ATxmega16D4-MH
Manufacturer:
Atmel
Quantity:
1 605
Company:
Part Number:
ATxmega16D4-MHR
Manufacturer:
SANYO
Quantity:
50
Part Number:
ATxmega16D4-MHR
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
12.4
12.5
8210B–AVR–04/10
Clock and Event Sources
Double Buffering
The Timer/Counter can be clocked from the Peripheral Clock (clk
tem, and
Figure 12-3. Clock and Event Selection
The Peripheral Clock is fed into the Common Prescaler (common for all Timer/Counters in a
device). A selection of the prescaler outputs is directly available for the Timer/Counter. In addi-
tion the whole range from 1 to 2
Each Timer/Counter has separate clock selection (CLKSEL), to select one of the prescaler out-
puts directly or an event channel as the Counter (CNT) input. This is referred to as Normal
Operation for the Counter, for details refer to
Event System, any event source such as an external clock signal on any I/O pin can be used as
clock input.
In addition the Timer/Counter can be controlled via the Event System. The Event Selection
(EVSEL) and Event Action (EVACT) settings can be used to trigger an event action from one or
more events. This is referred to as Event Action Controlled Operation for the Counter, for details
refer to
tion is used, the clock selection must be set to us an event channel as the Counter input.
By default no clock input is selected and the Timer/Counter is not running (OFF state).
The Period Register and the CC registers are all double buffered. Each buffer registers have an
associated Buffer Valid (BV) flag, which indicate that the buffer contains a valid, i.e. a new value
that is to be copied into the belonging period or compare register. For the Period register and for
the CC channels when used for compare operation, the Buffer Valid flag is set when data is writ-
ten to the buffer register and cleared on UPDATE condition. This is shown for a compare
register in
clk
”Event Action Controlled Operation” on page
PER
Figure 12-3
Figure 12-4 on page
CLKSEL
EVACT
EVSEL
Prescaler
Common
shows the clock and event selection logic.
{1,2,4,8,64,256,1024}
126.
15
(Encoding)
times prescaling is available through the Event System.
clk /
clk
2
{0,...,15}
PER
/
”Normal Operation” on page
Event System
event channels
127. When Event Action Controlled Opera-
PER
) and from the Event Sys-
Control Logic
events
XMEGA D
127. By using the
CNT
125