ATxmega16D4 Atmel Corporation, ATxmega16D4 Datasheet - Page 18

• Manufacturer Part Number: ATxmega16D4
• Manufacturer: Atmel Corporation

Specifications of ATxmega16D4

• Flash (kbytes): 16 Kbytes
• Pin Count: 44
• Max. Operating Frequency: 32 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Usb Speed: No
• Usb Interface: No
• Spi: 4
• Twi (i2c): 2
• Uart: 2
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 12
• Adc Speed (ksps): 200
• Analog Comparators: 2
• Resistive Touch Screen: No
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.6 to 3.6
• Operating Voltage (vcc): 1.6 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 14
• Input Capture Channels: 14
• Pwm Channels: 14
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

4. Memories
4.1
4.2
4.3
8210B–AVR–04/10
Features
Overview
Flash Program Memory
•
•
•
•
This section describes the different memories in XMEGA D. The AVR architecture has two main
memory spaces, the Program Memory and the Data Memory. Executable code can only reside
in the Program Memory, while data can be stored both in the Program Memory and the Data
Memory. The Data Memory includes both SRAM, and EEPROM Memory for non-volatile data
storage. All memory spaces are linear and require no paging. Non-Volatile Memory (NVM)
spaces can be locked for further write and read/write operations. This prevents unrestricted
access to the application software.
A separate memory section contains the Fuse bytes. These are used for setting important sys-
tem functions, and write access is only possible from an external programmer.
The XMEGA contains On-chip In-System Reprogrammable Flash memory for program storage.
The Flash memory can be accessed for read and write both from an external programmer
through the PDI, or from application software running in the CPU.
Flash Program Memory
Data Memory
Production Signature Row Memory for factory programmed data
User Signature Row
– One linear address space
– In-System Programmable
– Self-Programming and Bootloader support
– Application Section for application code
– Application Table Section for application code or data storage
– Boot Section for application code or bootloader code
– Separate lock bits and protection for all sections
– One linear address space
– Single cycle access from CPU
– SRAM
– EEPROM
– I/O Memory
Byte and page accessible
Optional memory mapping for direct load and store
Configuration and Status registers for all peripherals and modules
Four bit-accessible General Purpose Register for global variables or flags
Device ID for each microcontroller device type
Serial number for each device
Oscillator calibration bytes
ADC and temperature sensor calibration data
One flash page in size
Can be read and written from software
Content is kept after chip erase
XMEGA D
18