ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 5
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ATxmega64A1
Manufacturer Part Number
ATxmega64A1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A1
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A1-AU
Manufacturer:
Atmel
Quantity:
135
Company:
Part Number:
ATxmega64A1U-AU
Manufacturer:
ATMEL
Quantity:
953
3. Overview
8067M–AVR–09/10
The Atmel
CMOS 8/16-bit microcontrollers based on the AVR enhanced RISC architecture. By executing
powerful instructions in a single clock cycle, the XMEGA A1 achieves throughputs approaching
1 Million Instructions Per Second (MIPS) per MHz allowing the system designer to optimize
power consumption versus processing speed.
The AVR CPU combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction, executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs many times faster than conven-
tional single-accumulator or CISC based microcontrollers.
The XMEGA A1 devices provides the following features: In-System Programmable Flash with
Read-While-Write capabilities, Internal EEPROM and SRAM, four-channel DMA Controller,
eight-channel Event System, Programmable Multi-level Interrupt Controller, 78 general purpose
I/O lines, 16-bit Real Time Counter (RTC), eight flexible 16-bit Timer/Counters with compare
modes and PWM, eight USARTs, four Two Wire Serial Interfaces (TWIs), four Serial Peripheral
Interfaces (SPIs), AES and DES crypto engine, two 8-channel, 12-bit ADCs with optional differ-
ential input with programmable gain, two 2-channel, 12-bit DACs, four analog comparators with
window mode, programmable Watchdog Timer with seperate Internal Oscillator, accurate inter-
nal oscillators with PLL and prescaler and programmable Brown-Out Detection.
The Program and Debug Interface (PDI), a fast 2-pin interface for programming and debugging,
is available. The devices also have an IEEE std. 1149.1 compliant JTAG test interface, and this
can also be used for On-chip Debug and programming.
The XMEGA A1 devices have five software selectable power saving modes. The Idle mode
stops the CPU while allowing the SRAM, DMA Controller, Event System, Interrupt Controller and
all peripherals to continue functioning. The Power-down mode saves the SRAM and register
contents but stops the oscillators, disabling all other functions until the next TWI or pin-change
interrupt, or Reset. In Power-save mode, the asynchronous Real Time Counter continues to run,
allowing the application to maintain a timer base while the rest of the device is sleeping. In
Standby mode, the Crystal/Resonator Oscillator is kept running while the rest of the device is
sleeping. This allows very fast start-up from external crystal combined with low power consump-
tion. In Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue
to run. To further reduce power consumption, the peripheral clock to each individual peripheral
can optionally be stopped in Active mode and Idle sleep mode.
The device is manufactured using Atmel's high-density nonvolatile memory technology. The pro-
gram Flash memory can be reprogrammed in-system through the PDI or JTAG. A Bootloader
running in the device can use any interface to download the application program to the Flash
memory. The Bootloader software in the Boot Flash section will continue to run while the Appli-
cation Flash section is updated, providing true Read-While-Write operation. By combining an
8/16-bit RISC CPU with In-System Self-Programmable Flash, the Atmel XMEGA A1 is a power-
ful microcontroller family that provides a highly flexible and cost effective solution for many
embedded applications.
The XMEGA A1 devices are supported with a full suite of program and system development
tools including: C compilers, macro assemblers, program debugger/simulators, programmers,
and evaluation kits.
®
AVR
®
XMEGA
™
A1 is a family of low power, high performance and peripheral rich
XMEGA A1
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