ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 61
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ATxmega64A1
Manufacturer Part Number
ATxmega64A1
Description
Manufacturer
Atmel Corporation
Specifications of ATxmega64A1
Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATxmega64A1-AU
Manufacturer:
Atmel
Quantity:
135
Company:
Part Number:
ATxmega64A1U-AU
Manufacturer:
ATMEL
Quantity:
953
8067M–AVR–09/10
Mnemonics
CALL
RET
RETI
CPSE
CP
CPC
CPI
SBRC
SBRS
SBIC
SBIS
BRBS
BRBC
BREQ
BRNE
BRCS
BRCC
BRSH
BRLO
BRMI
BRPL
BRGE
BRLT
BRHS
BRHC
BRTS
BRTC
BRVS
BRVC
BRIE
BRID
MOV
MOVW
LDI
LDS
LD
LD
LD
LD
LD
Operands
k
Rd,Rr
Rd,Rr
Rd,Rr
Rd,K
Rr, b
Rr, b
A, b
A, b
s, k
s, k
Rd, Rr
Rd, Rr
Rd, K
Rd, k
Rd, X
Rd, X+
Rd, -X
Rd, Y
Rd, Y+
k
k
k
k
k
k
k
k
k
k
k
k
k
k
k
k
k
k
Description
call Subroutine
Subroutine Return
Interrupt Return
Compare, Skip if Equal
Compare
Compare with Carry
Compare with Immediate
Skip if Bit in Register Cleared
Skip if Bit in Register Set
Skip if Bit in I/O Register Cleared
Skip if Bit in I/O Register Set
Branch if Status Flag Set
Branch if Status Flag Cleared
Branch if Equal
Branch if Not Equal
Branch if Carry Set
Branch if Carry Cleared
Branch if Same or Higher
Branch if Lower
Branch if Minus
Branch if Plus
Branch if Greater or Equal, Signed
Branch if Less Than, Signed
Branch if Half Carry Flag Set
Branch if Half Carry Flag Cleared
Branch if T Flag Set
Branch if T Flag Cleared
Branch if Overflow Flag is Set
Branch if Overflow Flag is Cleared
Branch if Interrupt Enabled
Branch if Interrupt Disabled
Copy Register
Copy Register Pair
Load Immediate
Load Direct from data space
Load Indirect
Load Indirect and Post-Increment
Load Indirect and Pre-Decrement
Load Indirect
Load Indirect and Post-Increment
Data Transfer Instructions
if (SREG(s) = 1) then PC
if (SREG(s) = 0) then PC
if (N ⊕ V= 0) then PC
if (N ⊕ V= 1) then PC
if (I/O(A,b) = 0) PC
If (I/O(A,b) =1) PC
if (C = 0) then PC
if (N = 0) then PC
if (C = 1) then PC
if (C = 0) then PC
if (C = 1) then PC
if (N = 1) then PC
if (H = 1) then PC
if (H = 0) then PC
if (V = 1) then PC
if (V = 0) then PC
if (Z = 1) then PC
if (Z = 0) then PC
if (T = 1) then PC
if (T = 0) then PC
if (I = 1) then PC
if (I = 0) then PC
if (Rr(b) = 0) PC
if (Rr(b) = 1) PC
if (Rd = Rr) PC
Rd - Rr - C
X ← X - 1,
Rd ← (X)
Rd ← (Y)
Rd+1:Rd
Rd - Rr
Rd - K
Operation
PC
PC
PC
Rd
Rd
Rd
Rd
Rd
Rd
X
Y
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
←
k
STACK
STACK
PC + 2 or 3
PC + 2 or 3
PC + 2 or 3
PC + 2 or 3
PC + 2 or 3
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
PC + k + 1
Rr
Rr+1:Rr
K
(k)
(X)
(X)
X + 1
X - 1
(X)
(Y)
(Y)
Y + 1
XMEGA A1
Flags
None
None
I
None
Z,C,N,V,S,H
Z,C,N,V,S,H
Z,C,N,V,S,H
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
None
#Clocks
1 / 2 / 3
1 / 2 / 3
1 / 2 / 3
2 / 3 / 4
2 / 3 / 4
3 / 4
4 / 5
4 / 5
2
1
1
2
1
1
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
1 / 2
(1)(2)
(1)(2)
(1)(2)
(1)(2)
(1)(2)
(1)(2)
1
1
1
1
1
1
(1)
(1)
(1)
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