ATxmega64A1 Atmel Corporation, ATxmega64A1 Datasheet - Page 93

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ATxmega64A1

Manufacturer Part Number
ATxmega64A1
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64A1

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
78
Ext Interrupts
78
Usb Speed
No
Usb Interface
No
Spi
12
Twi (i2c)
4
Uart
8
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
4
Dac Resolution (bits)
12
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
8
Output Compare Channels
24
Input Capture Channels
24
Pwm Channels
24
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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8067M–AVR–09/10
10. Increased noise when using internal 1.0V reference at low temperature
11. Configuration of PGM and CWCM not as described in XMEGA A Manual
Table 35-1.
12 PWM is not restarted properly after a fault in cycle-by-cycle mode
13. BOD will be enabled after any reset
14. BODACT fuse location is not correct
15. Sampled BOD in Active mode will cause noise when bandgap is used as reference
When operating at below 0°C and using internal 1.0V reference the RMS noise will be up
4 LSB, Peak-to-peak noise up to 25 LSB.
Problem fix/Workaround
Use averaging to remove noise.
Enabling Common Waveform Channel Mode will enable Pattern generation mode (PGM),
but not Common Waveform Channel Mode.
Enabling Pattern Generation Mode (PGM) and not Common Waveform Channel Mode
(CWCM) will enable both Pattern Generation Mode and Common Waveform Channel Mode.
Problem fix/Workaround
When the AWeX fault restore mode is set to cycle-by-cycle, the waveform output will not
return to normal operation at first update after fault condition is no longer present.
Problem fix/Workaround
Do a write to any AWeX I/O register to re-enable the output.
If any reset source goes active, the BOD will be enabled and keep the device in reset if the
VCC voltage is below the programmed BOD level. During Power-On Reset, reset will not be
released until VCC is above the programmed BOD level even if the BOD is disabled.
Problem fix/Workaround
Do not set the BOD level higher than VCC even if the BOD is not used.
The fuses for enabling BOD in active mode (BODACT) are located at FUSEBYTE2, bit 2
and 3 and not in FUSEBYTE 5 as described in the XMEGA A Manual..
Problem fix/Workaround
Access the fuses in FUSEBYTE2.
Using the BOD in sampled mode when the device is running in Active or Idle mode will add
noise on the bandgap reference for ADC, DAC and Analog Comparator.
Problem fix/Workaround
If the bandgap is used as reference for either the ADC, DAC or Analog Comparator, the
BOD must not be set in sampled mode.
PGM
0
0
1
1
Configure PWM and CWCM according to this table:
CWCM
0
1
0
1
Description
PGM and CWCM disabled
PGM enabled
PGM and CWCM enabled
PGM enabled
XMEGA A1
93

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