SAM3N1B Atmel Corporation, SAM3N1B Datasheet - Page 122
SAM3N1B
Manufacturer Part Number
SAM3N1B
Description
Manufacturer
Atmel Corporation
Specifications of SAM3N1B
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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10.14.3
10.14.3.1
10.14.3.2
10.14.3.3
10.14.3.4
10.14.3.5
122
SDIV
UDIV
SAM3N
SDIV and UDIV
Syntax
Operation
Restrictions
Condition flags
Examples
R0, R2, R4
R8, R8, R1
Signed Divide and Unsigned Divide.
where:
cond
Rd
Rn
Rm
SDIV performs a signed integer division of the value in Rn by the value in Rm.
UDIV performs an unsigned integer division of the value in Rn by the value in Rm.
For both instructions, if the value in Rn is not divisible by the value in Rm, the result is rounded
towards zero.
Do not use SP and do not use PC
These instructions do not change the flags.
SDIV{cond} {Rd,} Rn, Rm
UDIV{cond} {Rd,} Rn, Rm
; Signed divide, R0 = R2/R4
; Unsigned divide, R8 = R8/R1
is an optional condition code, see
is the destination register. If Rd is omitted, the destination register is Rn.
is the register holding the value to be divided.
is a register holding the divisor.
.
“Conditional execution” on page
11011A–ATARM–04-Oct-10
84.
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