SAM3N1B Atmel Corporation, SAM3N1B Datasheet - Page 27

• Manufacturer Part Number: SAM3N1B
• Manufacturer: Atmel Corporation

Specifications of SAM3N1B

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 10
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7.2
7.2.1
7.2.2
7.2.3
7.2.3.1
7.2.3.2
7.2.3.3
11011A–ATARM–04-Oct-10
Embedded Memories
Internal SRAM
Internal ROM
Embedded Flash
Flash Overview
Flash Power Supply
Enhanced Embedded Flash Controller
The SAM3N4 product embeds a total of 24-Kbytes high-speed SRAM.
The SAM3N2 product embeds a total of 16-Kbytes high-speed SRAM.
The SAM3N1 product embeds a total of 8-Kbytes high-speed SRAM.
The SRAM is accessible over System Cortex-M3 bus at address 0x2000 0000.
The SRAM is in the bit band region. The bit band alias region is from 0x2200 0000 and 0x23FF
FFFF.
RAM size must be configurable by calibration fuses.
The SAM3N product embeds an Internal ROM, which contains the SAM Boot Assistant
(SAM-BA), In Application Programming routines (IAP) and Fast Flash Programming Interface
(FFPI).
At any time, the ROM is mapped at address 0x0080 0000.
The Flash of the SAM3N4 (256 Kbytes) is organized in one bank of 1024 pages of 256 bytes
(Single plane).
The Flash of the SAM3N2 (128 Kbytes) is organized in one bank of 512 pages of 256 bytes (Sin-
gle Plane).
The Flash of the SAM3N1 (64 Kbytes) is organized in one bank of 256 pages of 256 bytes (Sin-
gle plane).
The Flash contains a 128-byte write buffer, accessible through a 32-bit interface.
The Flash is supplied by VDDCORE.
The Enhanced Embedded Flash Controller (EEFC) manages accesses performed by the mas-
ters of the system. It enables reading the Flash and writing the write buffer. It also contains a
User Interface, mapped on the APB.
The Enhanced Embedded Flash Controller ensures the interface of the Flash block with the 32-
bit internal bus. Its 128-bit wide memory interface increases performance.
The user can choose between high performance or lower current consumption by selecting
either 128-bit or 64-bit access. It also manages the programming, erasing, locking and unlocking
sequences of the Flash using a full set of commands.
One of the commands returns the embedded Flash descriptor definition that informs the system
about the Flash organization, thus making the software generic.
SAM3N
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