SAM3N1B Atmel Corporation, SAM3N1B Datasheet - Page 287

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SAM3N1B

Manufacturer Part Number
SAM3N1B
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of SAM3N1B

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
18.4.1
Name:
Address:
Access:
Offset:
• FRDY: Ready Interrupt Enable
0: Flash Ready does not generate an interrupt.
1: Flash Ready (to accept a new command) generates an interrupt.
• FWS: Flash Wait State
This field defines the number of wait states for read and write operations:
• FAM: Flash Access Mode
0: 128-bit access in read Mode only, to enhance access speed.
1: 64-bit access in read Mode only, to enhance power consumption.
No Flash read should be done during change of this register.
11011A–ATARM–04-Oct-10
Number of cycles for Read/Write operations = FWS+1
31
23
15
7
EEFC Flash Mode Register
30
22
14
EEFC_FMR
0x400E0A00
Read-write
0x00
6
29
21
13
5
28
20
12
4
27
19
11
3
26
18
10
2
FWS
25
17
9
1
SAM3N
FRDY
FAM
24
16
8
0
287

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