SAM3N1B Atmel Corporation, SAM3N1B Datasheet - Page 155
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SAM3N1B
Manufacturer Part Number
SAM3N1B
Description
Manufacturer
Atmel Corporation
Specifications of SAM3N1B
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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10.20.4
• SETPEND
Interrupt set-pending bits.
Write:
0 = no effect.
1 = changes interrupt state to pending.
Read:
0 = interrupt is not pending.
1 = interrupt is pending.
Writing 1 to the ISPR bit corresponding to:
11011A–ATARM–04-Oct-10
• an interrupt that is pending has no effect
• a disabled interrupt sets the state of that interrupt to pending
31
23
15
7
Interrupt Set-pending Registers
30
22
14
6
The ISPR0 register forces interrupts into the pending state, and shows which interrupts are
pending. See:
The bit assignments are:
• the register summary in
•
Table 10-28 on page 152
29
21
13
5
28
20
12
4
Table 10-27 on page 151
for which interrupts are controlled by each register.
SETPEND
SETPEND
SETPEND
SETPEND
27
19
11
3
for the register attributes
26
18
10
2
25
17
9
1
SAM3N
24
16
8
0
155
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