SAM3N1B Atmel Corporation, SAM3N1B Datasheet - Page 605

• Manufacturer Part Number: SAM3N1B
• Manufacturer: Atmel Corporation

Specifications of SAM3N1B

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 48 MHz
• Cpu: Cortex-M3
• # Of Touch Channels: 17
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 34
• Ext Interrupts: 34
• Quadrature Decoder Channels: 2
• Usb Speed: No
• Usb Interface: No
• Spi: 3
• Twi (i2c): 2
• Uart: 4
• Ssc: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 10
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 8
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 1.62 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

31.7.2
Name:
Addresses:
Access:
This register can only be written if the WPEN bit is cleared in
• TC0XC0S: External Clock Signal 0 Selection
• TC1XC1S: External Clock Signal 1 Selection
• TC2XC2S: External Clock Signal 2 Selection
• QDEN: Quadrature Decoder ENabled
0 = disabled.
1 = enables the quadrature decoder logic (filter, edge detection and quadrature decoding).
quadrature decoding (direction change) can be disabled using QDTRANS bit.
One of the POSEN or SPEEDEN bits must be also enabled.
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
Value
Value
Value
INVIDX
0
1
2
3
0
1
2
3
0
1
2
3
31
23
15
–
7
–
TC Block Mode Register
Name
TCLK0
–
TIOA1
TIOA2
Name
TCLK1
–
TIOA0
TIOA2
Name
TCLK2
–
TIOA1
TIOA2
INVB
30
22
14
TC_BMR
0x400100C4 (0), 0x400140C4 (1)
Read-write
–
6
–
MAXFILT
Description
Signal connected to XC0: TCLK0
Reserved
Signal connected to XC0: TIOA1
Signal connected to XC0: TIOA2
Description
Signal connected to XC1: TCLK1
Reserved
Signal connected to XC1: TIOA0
Signal connected to XC1: TIOA2
Description
Signal connected to XC2: TCLK2
Reserved
Signal connected to XC2: TIOA1
Signal connected to XC2: TIOA2
INVA
29
21
13
–
5
TC2XC2S
EDGPHA
28
20
12
–
4
“TC Write Protect Mode Register” on page
QDTRANS
FILTER
27
19
11
–
3
TC1XC1S
SPEEDEN
26
18
10
–
–
2
IDXPHB
POSEN
25
17
9
1
TC0XC0S
MAXFILT
612.
SAM3N
SAM3N
SWAP
QDEN
24
16
8
0
605
605