SAM3N1B Atmel Corporation, SAM3N1B Datasheet - Page 582
SAM3N1B
Manufacturer Part Number
SAM3N1B
Description
Manufacturer
Atmel Corporation
Specifications of SAM3N1B
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
48 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
34
Ext Interrupts
34
Quadrature Decoder Channels
2
Usb Speed
No
Usb Interface
No
Spi
3
Twi (i2c)
2
Uart
4
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
10
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
8
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
6
Output Compare Channels
6
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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31.4
31.5
31.5.1
31.5.2
31.5.3
582
582
Pin Name List
Product Dependencies
SAM3N
SAM3N
I/O Lines
Power Management
Interrupt
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines.
The programmer must first program the PIO controllers to assign the TC pins to their peripheral
functions.
Table 31-3.
The TC is clocked through the Power Management Controller (PMC), thus the programmer must
first configure the PMC to enable the Timer Counter clock.
The TC has an interrupt line connected to the Interrupt Controller (IC). Handling the TC interrupt
requires programming the IC before configuring the TC.
Pin Name
TCLK0-TCLK2
TIOA0-TIOA2
TIOB0-TIOB2
Instance
TC0
TC0
TC0
TC0
TC0
TC0
TC0
TC0
TC0
TC1
TC1
TC1
TC1
TC1
TC1
TC1
TC1
TC1
I/O Lines
I/O Line A
I/O Line B
External Clock Input
Description
TCLK0
TCLK1
TCLK2
TCLK3
TCLK4
TCLK5
Signal
TIOA0
TIOA1
TIOA2
TIOB0
TIOB1
TIOB2
TIOA3
TIOA4
TIOA5
TIOB3
TIOB4
TIOB5
I/O Line
PC25
PC28
PC31
PC23
PC26
PC29
PC24
PC27
PC30
PA28
PA29
PA15
PA26
PA16
PA27
PA1
PA4
PA0
Type
Input
I/O
I/O
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
Peripheral
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
B
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