SAM3S2A Atmel Corporation, SAM3S2A Datasheet - Page 687
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SAM3S2A
Manufacturer Part Number
SAM3S2A
Description
Manufacturer
Atmel Corporation
Specifications of SAM3S2A
Flash (kbytes)
128 Kbytes
Pin Count
48
Max. Operating Frequency
64 MHz
Cpu
Cortex-M3
# Of Touch Channels
17
Hardware Qtouch Acquisition
No
Max I/o Pins
47
Ext Interrupts
47
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
2
Uart
3
Ssc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
1000
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
32
Self Program Memory
YES
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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6500C–ATARM–8-Feb-11
sists of a user-defined pattern that indicates the beginning of a valid data.
illustrates these patterns. If the start frame delimiter, also known as start bit, is one bit, (ONEBIT
to 1), a logic zero is Manchester encoded and indicates that a new character is being sent seri-
ally on the line. If the start frame delimiter is a synchronization pattern also referred to as sync
(ONEBIT to 0), a sequence of 3 bit times is sent serially on the line to indicate the start of a new
Figure 33-8. NRZ to Manchester Encoding
The Manchester encoded character can also be encapsulated by adding both a configurable
preamble and a start frame delimiter pattern. Depending on the configuration, the preamble is a
training sequence, composed of a pre-defined pattern with a programmable length from 1 to 15
bit times. If the preamble length is set to 0, the preamble waveform is not generated prior to any
character. The preamble pattern is chosen among the following sequences: ALL_ONE,
ALL_ZERO, ONE_ZERO or ZERO_ONE, writing the field TX_PP in the US_MAN register, the
field TX_PL is used to configure the preamble length.
valid patterns. To improve flexibility, the encoding scheme can be configured using the
TX_MPOL field in the US_MAN register. If the TX_MPOL field is set to zero (default), a logic
zero is encoded with a zero-to-one transition and a logic one is encoded with a one-to-zero tran-
sition. If the TX_MPOL field is set to one, a logic one is encoded with a one-to-zero transition
and a logic zero is encoded with a zero-to-one transition.
Figure 33-9. Preamble Patterns, Default Polarity Assumed
A start frame delimiter is to be configured using the ONEBIT field in the US_MR register. It con-
Manchester
Manchester
Manchester
Manchester
encoded
encoded
encoded
encoded
data
data
data
data
Manchester
encoded
encoded
NRZ
data
data
Txd
Txd
Txd
Txd
Txd
8 bit width "ZERO_ONE" Preamble
8 bit width "ONE_ZERO" Preamble
8 bit width "ALL_ZERO" Preamble
1
8 bit width "ALL_ONE" Preamble
0
1
1
0
Figure 33-9
0
0
illustrates and defines the
SFD
SFD
SFD
SFD
1
Figure 33-10
SAM3S
SAM3S
DATA
DATA
DATA
DATA
687
687
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