SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 713
SAM9263
Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.SAM9260.pdf
(290 pages)
4.SAM9261.pdf
(248 pages)
5.SAM9263.pdf
(1109 pages)
6.SAM9263.pdf
(51 pages)
Specifications of SAM9263
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- M40800 PDF datasheet #2
- SAM9260 PDF datasheet #3
- SAM9261 PDF datasheet #4
- SAM9263 PDF datasheet #5
- SAM9263 PDF datasheet #6
- Current page: 713 of 1109
- Download datasheet (17Mb)
6249I–ATARM–3-Oct-11
Figure 38-4. Non Overlapped Center Aligned Waveforms
Note:
When center aligned, the internal channel counter increases up to CPRD and.decreases down
to 0. This ends the period.
• the waveform duty cycle. This channel parameter is defined in the CDTY field of the
• the waveform polarity. At the beginning of the period, the signal can be at high or low level.
• the waveform alignment. The output waveform can be left or center aligned. Center aligned
If the waveform is center aligned then the output waveform period depends on the counter
source clock and can be calculated:
By using the Master Clock (MCK) divided by an X given prescaler value
(with X being 1, 2, 4, 8, 16, 32, 64, 128, 256, 512, or 1024). The resulting period formula will
be:
By using a Master Clock divided by one of both DIVA or DIVB divider, the formula becomes,
respectively:
PWM_CDTYx register.
If the waveform is left aligned then:
If the waveform is center aligned, then:
This property is defined in the CPOL field of the PWM_CMRx register. By default the signal
starts by a low level.
waveforms can be used to generate non overlapped waveforms. This property is defined in
the CALG field of the PWM_CMRx register. The default mode is left aligned.
(
------------------------------------------ -
(
------------------------------------------ -
(
----------------------------------------------------- -
CRPD
PWM0
PWM1
2
2
duty cycle
duty cycle
×
×
X
CPRD
1. See
MCK
MCK
×
×
MCK
CPRD
DIVA
×
Figure 38-5 on page 715
=
DIVA
=
No overlap
)
)
(
----------------------------------------------------------------------------------------------------------- -
(
----------------------------------------------------------------------------------------------------------------------------- -
or
period 1
(
period
)
(
---------------------------------------------- -
CRPD
or
Period
(
----------------------------------------------------- -
–
2
MCK
⁄
×
×
2
⁄
CPRD
DIVAB
) 1
fchannel_x_clock
–
MCK
period
⁄
(
×
period
)
fchannel_x_clock
for a detailed description of center aligned waveforms.
DIVB
)
⁄
2
)
×
CDTY
×
CDTY
)
) )
AT91SAM9263
713
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