SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 900
SAM9263
Manufacturer Part Number
SAM9263
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.M40800.pdf
(153 pages)
3.SAM9260.pdf
(290 pages)
4.SAM9261.pdf
(248 pages)
5.SAM9263.pdf
(1109 pages)
6.SAM9263.pdf
(51 pages)
Specifications of SAM9263
Flash (kbytes)
0 Kbytes
Pin Count
324
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
160
Ext Interrupts
160
Usb Transceiver
3
Usb Speed
Full Speed
Usb Interface
Host, Device
Spi
2
Twi (i2c)
1
Uart
4
Can
1
Ssc
2
Ethernet
1
Sd / Emmc
2
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
Yes
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
96
Self Program Memory
NO
External Bus Interface
2
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- M40800 PDF datasheet #2
- SAM9260 PDF datasheet #3
- SAM9261 PDF datasheet #4
- SAM9263 PDF datasheet #5
- SAM9263 PDF datasheet #6
- Current page: 900 of 1109
- Download datasheet (17Mb)
44.5.1.3
44.5.1.4
44.5.1.5
900
AT91SAM9263
Channel-U
Channel-L
Control
BRSTLN field of the DMAFRMCFG register. For details on this register, see
figuration Register” on page
This block stores the base address and the number of words transferred for this channel (frame
in single scan mode and Upper Panel in dual scan mode) since the beginning of the frame. It
also generates the end of frame signal.
It has two pointers, the base address and the number of words to transfer. When the module
receives a new_frame signal, it reloads the number of words to transfer pointer with the size of
the frame/panel. When the module receives the new_frame signal, it also reloads the base
address with the base address programmed by the host.
The size of the frame/panel can be programmed in the FRMSIZE field of the DMAFRMCFG
Register. This size is calculated as follows:
where:
X_size = ((LINESIZE+1)*Bpp+PIXELOFF)/32
Y_size = (LINEVAL+1)
Note:
This block has the same functionality as Channel-U, but for the Lower Panel in dual scan mode
only.
This block receives the request signals from the LCDC core and generates the requests for the
channels.
• LINESIZE is the horizontal size of the display in pixels, minus 1, as programmed in the
• Bpp is the number of bits per pixel configured.
• PIXELOFF is the pixel offset for 2D addressing, as programmed in the DMA2DCFG register.
• LINEVAL is the vertical size of the display in pixels, minus 1, as programmed in the LINEVAL
LINESIZE field of the LCDFRMCFG register of the LCD Controller.
Applicable only if 2D addressing is being used.
field of the LCDFRMCFG register of the LCD Controller.
X_size is calculated as an up-rounding of a division by 32. (This can also be done adding 31 to the
dividend before using an integer division by 32). When using the 2D-addressing mode (see
Memory Addressing” on page
cuted and the FRMSIZE field programmed with every movement of the displaying window, since a
change in the PIXELOFF field can change the resulting FRMSIZE value.
Frame_size
933.
=
X_size*Y_size
------------------------------------- -
922), it is important to note that the above calculation must be exe-
32
“DMA Frame Con-
6249I–ATARM–3-Oct-11
“2D
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