SAM9263 Atmel Corporation, SAM9263 Datasheet - Page 72

• Manufacturer Part Number: SAM9263
• Manufacturer: Atmel Corporation

Specifications of SAM9263

• Flash (kbytes): 0 Kbytes
• Pin Count: 324
• Max. Operating Frequency: 240 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 160
• Ext Interrupts: 160
• Usb Transceiver: 3
• Usb Speed: Full Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 1
• Uart: 4
• Can: 1
• Ssc: 2
• Ethernet: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: Yes
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 96
• Self Program Memory: NO
• External Bus Interface: 2
• Dram Memory: sdram
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Fpu: No
• Mpu / Mmu: No / Yes
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

6249I–ATARM–3-Oct-11
Memory Decoder Inputs
FIFO
Half-rate Clocking Mode
The eight memory map decoder inputs are connected to custom address decoders. The
address decoders divide the memory into regions of on-chip SRAM, on-chip ROM, and peripher-
als. The address decoders also optimize the ETM9 trace trigger.
Table 12-2.
A 45-byte FIFO is used to store data tracing. The FIFO is used to separate the pipeline status
from the trace packet. So, the FIFO can be used to buffer trace packets.
A FIFO overflow is detected by the embedded trace macrocell when the FIFO is full or when the
FIFO has less bytes than the user-programmed number.
The ETM9 is implemented in half-rate mode that allows both rising and falling edge data tracing
of the trace clock.
The half-rate mode is implemented to maintain the signal clock integrity of high speed systems
(up to 100 MHz).
Figure 12-5.
Care must be taken on the choice of the trace capture system as it needs to support half-rate
clock functionality.
Product Resource
SRAM
SRAM
ROM
ROM
External Bus Interface
External Bus Interface
User Peripherals
System Peripherals
ETM Memory Map Inputs Layout
Half-rate Clocking Mode
ARM920T Clock
Trace Clock
Area
Internal
Internal
Internal
Internal
External
External
Internal
Internal
TraceData
Access Type
Data
Fetch
Data
Fetch
Data
Fetch
Data
Data
Half-rate Clocking Mode
Start Address
0x0000 0000
0x0000 0000
0x0040 0000
0x0040 0000
0x1000 0000
0x1000 0000
0xF000 0000
0xFFFF C000
AT91SAM9263
End Address
0x004F FFFF
0x004F FFFF
0x9FFF FFFF
0xFFFF BFFF
0xFFFF FFFF
0x002F FFFF
0x002F FFFF
0x9FFF FFFF
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