AD7195 Analog Devices, AD7195 Datasheet - Page 24

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AD7195

Manufacturer Part Number
AD7195
Description
4.8 kHz, Ultralow Noise, 24-Bit Sigma-Delta ADC with PGA and AC Excitation
Manufacturer
Analog Devices
Datasheet

Specifications of AD7195

Resolution (bits)
24bit
# Chan
4
Sample Rate
n/a
Interface
Ser,SPI
Analog Input Type
Diff-Bip,Diff-Uni,SE-Bip,SE-Uni
Ain Range
(2Vref/PGA Gain) p-p
Adc Architecture
Sigma-Delta
Pkg Type
CSP

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AD7195
OFFSET REGISTER
The offset register holds the offset calibration coefficient for the
ADC. The power-on reset value of the offset register is
0x800000. The AD7195 has four offset registers; therefore, each
channel has a dedicated offset register (see Table 25). Each of
these registers is a 24-bit read/write register. This register is
used in conjunction with its associated full-scale register to
form a register pair. The power-on reset value is automatically
overwritten if an internal or system zero-scale calibration is
initiated by the user. The AD7195 must be placed in power-
down mode or idle mode when writing to the offset register.
(RS2, RS1, RS0 = 1, 1, 0; Power-On/Reset = 0x800000)
Rev. 0 | Page 24 of 44
FULL-SCALE REGISTER
(RS2, RS1, RS0 = 1, 1, 1; Power-On/Reset = 0x5XXXX0)
The full-scale register is a 24-bit register that holds the full-scale
calibration coefficient for the ADC. The AD7195 has four full-
scale registers; therefore, each channel has a dedicated full-scale
register (see Table 25). The full-scale registers are read/write
registers. However, when writing to the full-scale registers, the
ADC must be placed in power-down mode or idle mode. These
registers are configured at power-on with factory-calibrated
full-scale calibration coefficients, the calibration being performed
at gain = 1. Therefore, every device has different default coeffic-
ients. The default value is automatically overwritten if an
internal or system full-scale calibration is initiated by the user
or if the full-scale register is written to.

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