AD7153 Analog Devices, AD7153 Datasheet - Page 4

• Manufacturer Part Number: AD7153
• Description: 12-Bit Capacitance-to-Digital Converter (1 Capacitance Input Channel)
• Manufacturer: Analog Devices

Specifications of AD7153

• Resolution (bits): 12bit
• # Chan: 1
• Sample Rate: 200SPS
• Interface: I²C/Ser 2-Wire,Ser
• Analog Input Type: Capacitive
• Ain Range: ±0.25 pF to ±2 pF Diff,0.5 pF to 4 pF SE
• Adc Architecture: Sigma-Delta
• Pkg Type: SOP

AD7152/AD7153
Parameter
POWER REQUIREMENTS
1
2
3
4
5
6
7
8
9
Capacitance units: 1 pF = 10
Specification is not production tested but is supported by characterization data at initial product release.
Except Channel 2 in differential mode. To achieve the specified performance in differential mode, the I
prevent signal coupling from the SCL pin to the adjacent CIN2(−) pin.
gain drift over temperature is required.
Specification is not production tested but guaranteed by design.
A system offset calibration is effectively a conversion; therefore, the offset error is of the order of the conversion noise. This applies after calibration at the temperature,
capacitive input range, and applied V
CAPDACs.
The gain error is factory calibrated at 25°C. At different temperatures, compensation for gain drift over temperature is required.
further reduce the CIN offset or the unchanging CIN component.
Digital inputs equal to V
Factory calibrated. The absolute error includes factory gain calibration error and integral nonlinearity error all at 25°C. At different temperatures, compensation for
The CAPDAC resolution is five bits in the actual CAPDAC full range. Using the on-chip offset calibration or adjusting the capacitive offset calibration register can
V
Current, I
Current Power-Down Mode, I
DD
-to-GND Voltage
DD
9
DD
or GND.
−12
F; 1 fF = 10
DD
DD
9
of interest. The capacitive input offset can be reduced using a system offset calibration. Large offsets should be removed using
−15
F; 1 aF = 10
−18
F.
Min
2.7
Typ
100
1
3
Rev. 0 | Page 4 of 24
Max
3.6
120
5
10
Unit
μA
μA
V
μA
1
2
C interface must be idle during the capacitance conversion to
Test Conditions/Comments
V
Temperature ≤ 25°C
Temperature = 85°C
DD
= 3.3 V, nominal