AD7765 Analog Devices, AD7765 Datasheet - Page 27

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AD7765

Manufacturer Part Number
AD7765
Description
24-Bit, 156 kSPS, 112 dB Sigma-Delta ADC with On-Chip Buffers and Serial Interface
Manufacturer
Analog Devices
Datasheet

Specifications of AD7765

Resolution (bits)
24bit
# Chan
1
Sample Rate
40MSPS
Interface
Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
6.5 V p-p
Adc Architecture
Sigma-Delta
Pkg Type
SOP

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USING THE AD7765
The following is the recommended sequence for powering up
and using the AD7765:
1.
2.
3.
4.
5.
Apply power to the device.
Apply the MCLK signal.
Take RESET low for a minimum of one MCLK cycle,
preferably synchronous to the falling MCLK edge. If
multiple parts are to be synchronized, apply a common
RESET to all devices.
Wait a minimum of two MCLK cycles after
been released.
If multiple parts are being synchronized, a
must be applied to the parts, preferably synchronous with
the MCLK rising edge. In the case where devices are not
being synchronized, no SYNC pulse is required; a logic
high signal should simply be applied to the SYNC
When applying the
The issue of a
coincide with a write to the device.
Ensure that the
minimum of four MCLK periods.
SYNC
SYNC
SYNC
pulse to the device must not
pulse,
pulse is taken low for a
SYNC pulse
RESET
pin.
has
Rev. A | Page 27 of 32
Data can then be read from the device using the default gain
and overrange threshold values. The conversion data read is not
valid, however, until the settling time of the filter has elapsed.
Once this has occurred, the FILTER-SETTLE status bit is set,
indicating that the data is valid.
Values for gain and overrange thresholds can be written to or
read from the respective registers at this stage.
BIAS RESISTOR SELECTION
The AD7765 requires a resistor to be connected between the
R
give a current of 25 µA through the resistor to ground. For a
4.096 V reference voltage, the correct resistor value is 160 kΩ.
BIAS
and AGNDx pins. The resistor value should be selected to
AD7765

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