AD7693 Analog Devices, AD7693 Datasheet - Page 5

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AD7693

Manufacturer Part Number
AD7693
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD7693

Resolution (bits)
16bit
# Chan
1
Sample Rate
500kSPS
Interface
Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
(2Vref) p-p,Bip (Vref) x 2
Adc Architecture
SAR
Pkg Type
CSP,SOP

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TIMING SPECIFICATIONS
VDD = 4.5 V to 5.5 V, VIO = 2.3 V to VDD, V
Table 4.
Parameter
Conversion Time: CNV Rising Edge to Data Available
Acquisition Time
Time Between Conversions
CNV Pulse Width (CS Mode)
SCK Period (CS Mode)
SCK Period (Chain Mode)
SCK Low Time
SCK High Time
SCK Falling Edge to Data Remains Valid
SCK Falling Edge to Data Valid Delay
CNV or SDI Low to SDO D15 MSB Valid (CS Mode)
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode)
SDI Valid Setup Time from CNV Rising Edge (CS Mode)
SDI Valid Hold Time from CNV Rising Edge (CS Mode)
SCK Valid Setup Time from CNV Rising Edge (Chain Mode)
SCK Valid Hold Time from CNV Rising Edge (Chain Mode)
SDI Valid Setup Time from SCK Falling Edge (Chain Mode)
SDI Valid Hold Time from SCK Falling Edge (Chain Mode)
SDI High to SDO High (Chain Mode with Busy Indicator)
1
See Figure 3 and Figure 4 for load conditions.
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
VIO Above 4.5 V
VIO Above 2.7 V
VIO Above 2.3 V
VIO Above 4.5 V
VIO Above 2.3 V
1
REF
= VDD, all specifications T
Rev. A | Page 5 of 24
MIN
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CONV
ACQ
CYC
CNVH
SCK
SCK
SCKL
SCKH
HSDO
DSDO
EN
DIS
SSDICNV
HSDICNV
SSCKCNV
HSCKCNV
SSDISCK
HSDISCK
DSDOSDI
to T
MAX
, unless otherwise noted.
Min
0.5
400
2.0
10
15
17
18
19
20
7
7
4
15
0
5
10
4
4
Typ
Max
1.6
14
15
16
17
15
18
22
25
15
26
AD7693
Unit
μs
ns
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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