AD7687 Analog Devices, AD7687 Datasheet - Page 5

• Manufacturer Part Number: AD7687
• Manufacturer: Analog Devices

Specifications of AD7687

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 250kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (2Vref) p-p
• Adc Architecture: SAR
• Pkg Type: CSP,SOP

Data Sheet
TIMING SPECIFICATIONS
−40°C to +85°C, VDD = 4.5 V to 5.5 V, VIO = 2.3 V to 5.5 V or VDD + 0.3 V, whichever is the lowest, unless otherwise stated.
See Figure 3 and Figure 4 for load conditions.
Table 4.
Parameter
Conversion Time: CNV Rising Edge to Data Available
Acquisition Time
Time Between Conversions
CNV Pulse Width (CS Mode)
SCK Period (CS Mode)
SCK Period (Chain Mode)
SCK Low Time
SCK High Time
SCK Falling Edge to Data Remains Valid
SCK Falling Edge to Data Valid Delay
CNV or SDI Low to SDO D15 MSB Valid (CS Mode)
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode)
SDI Valid Setup Time from CNV Rising Edge (CS Mode)
SDI Valid Hold Time from CNV Rising Edge (CS Mode)
SCK Valid Setup Time from CNV Rising Edge (Chain Mode)
SCK Valid Hold Time from CNV Rising Edge (Chain Mode)
SDI Valid Setup Time from SCK Falling Edge (Chain Mode)
SDI Valid Hold Time from SCK Falling Edge (Chain Mode)
SDI High to SDO High (Chain Mode with BUSY indicator)
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
VIO Above 4.5 V
VIO Above 2.7 V
VIO Above 2.3 V
VIO Above 4.5 V
VIO Above 2.3 V
Rev. B | Page 5 of 28
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CONV
ACQ
CYC
CNVH
SCK
SCK
SCKL
SCKH
HSDO
DSDO
EN
DIS
SSDICNV
HSDICNV
SSCKCNV
HSCKCNV
SSDISCK
HSDISCK
DSDOSDI
Min
0.5
1.8
4
10
15
17
18
19
20
7
7
5
15
0
5
5
3
4
Typ
Max
2.2
14
15
16
17
15
18
22
25
15
26
AD7687
Unit
μs
μs
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns