AD7994 Analog Devices, AD7994 Datasheet - Page 26

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AD7994

Manufacturer Part Number
AD7994
Description
4 Channel, 12-Bit ADC with I2C Compatible Interface in 16-Lead TSSOP
Manufacturer
Analog Devices
Datasheet

Specifications of AD7994

Resolution (bits)
12bit
# Chan
4
Sample Rate
188kSPS
Interface
I²C/Ser 2-Wire,Ser
Analog Input Type
SE-Uni
Ain Range
Uni (Vref)
Adc Architecture
SAR
Pkg Type
SOP

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AD7993/AD7994
READING DATA FROM THE AD7993/AD7994
Reading data from the AD7993/AD7994 is a 1-byte or 2-byte
operation. Reading back the contents of the alert status register
or the cycle timer register is a single-byte read operation, as
shown in Figure 29. This assumes the particular register address
has previously been set up by a single-byte write operation to
the address pointer register, as shown in Figure 26. Once the
register address has been set up, any number of reads can be
performed from that particular register without having to write
to the address pointer register again. If a read from a different
register is required, the relevant register address has to be
written to the address pointer register, and again, any number of
reads from this register may then be performed.
SDA
SCL
SDA
SCL
START BY
START BY
MASTER
MASTER
0
1
0
1
1
1
SERIAL BUS ADDRESS BYTE
SERIAL BUS ADDRESS BYTE
0
0
A3
FRAME 1
A3
FRAME 1
Figure 30. Reading Two Bytes of Data from the Conversion Result Register
A2
Figure 29. Reading a Single Byte of Data from a Selected Register
A2
SCL (CONTINUED)
SDA (CONTINUED)
A1
A1
AD7993/AD7994
A0
A0
ACK. BY
R/W
R/W
AD7993/AD7994
Rev. 0 | Page 26 of 32
ACK. BY
9
9
ALERT
FLAG
D7
1
D7
1
1
Reading data from the configuration register, conversion result
register, DATA
registers is a 2-byte operation, as shown in Figure 30. The same
rules apply for a 2-byte read as a 1-byte read.
When reading data back from a register on the AD7993 or the
AD7994, for example the conversion result register, if more than
two read bytes are supplied, the same or new data is read from
the AD7993/AD7994 without the need to readdress the device.
This allows the master to continuously read from a data register
without having to readdress the AD7993/AD7994.
ZERO
D6
D6
SINGLE DATA BYTE FROM AD7993/AD7994
MOST SIGNIFICANT DATA BYTE FROM
MOST SIGNIFICANT DATA BYTE FROM
CH
D5
D5
ID1
CH
D4
D4
AD7993/AD7994
AD7993/AD7994
ID0
HIGH
FRAME 2
FRAME 2
FRAME 2
D11
D3
D3
registers, DATA
D2
D10
D2
D1
D1/0
D9
D0
D0/0
D8
NO ACK. BY
NO ACK. BY
MASTER
LOW
MASTER
MASTER
ACK. BY
9
9
9
registers, or hysteresis
STOP BY
STOP BY
MASTER
MASTER

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