AD7928 Analog Devices, AD7928 Datasheet
AD7928
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AD7928 Summary of contents
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... Eight Single-Ended Inputs with a Channel Sequencer. A sequence of channels can be selected, through which the ADC cycles and converts on. 3. Single-Supply Operation with V AD7918/AD7928 operate from a single 2 5.25 V supply. The V DRIVE to either processor systems independent Flexible Power/Serial Clock Speed Management. The conversion rate is determined by the serial clock, allowing the conversion time to be reduced through the serial clock speed increase ...
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... TABLE OF CONTENTS Features .............................................................................................. 1 General Description ......................................................................... 1 Functional Block Diagram .............................................................. 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 AD7908 Specifications................................................................. 3 AD7918 Specifications................................................................. 5 AD7928 Specifications................................................................. 7 Timing Specifications .................................................................. 9 Absolute Maximum Ratings.......................................................... 10 ESD Caution................................................................................ 10 Pin Configuration and Function Descriptions........................... 11 Terminology .................................................................................... 12 Typical Performance Characteristics ........................................... 13 Performance Curves................................................................... 13 REVISION HISTORY 12/10—Rev Rev. D Changes to Features Section ...
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... V V min DRIVE 0.3 × max DRIVE ±1 μA max 10 pF max Rev Page AD7908/AD7918/AD7928 , unless otherwise noted. Test Conditions/Comments kHz sine wave SCLK B models W models B models W models fa = 40.1 kHz 41.5 kHz f = 400 kHz ...
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... AD7908/AD7918/AD7928 Parameter LOGIC OUTPUTS Output High Voltage Output Low Voltage Floating-State Leakage Current Floating-State Output Capacitance 3 Output Coding CONVERSION RATE Conversion Time Track-and-Hold Acquisition Time Throughput Rate POWER REQUIREMENTS DRIVE Normal Mode (Static) Normal Mode (Operational) Using Auto Shutdown Mode ...
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... V V min DRIVE 0.3 × max DRIVE ±1 μA max 10 pF max Rev Page AD7908/AD7918/AD7928 , unless otherwise noted. Test Conditions/Comments kHz sine wave MHz IN SCLK B models W models B models W models fa = 40.1 kHz 41.5 kHz f = 400 kHz ...
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... AD7908/AD7918/AD7928 Parameter LOGIC OUTPUTS Output High Voltage Output Low Voltage Floating-State Leakage Current Floating-State Output Capacitance 3 Output Coding CONVERSION RATE Conversion Time Track-and-Hold Acquisition Time Throughput Rate POWER REQUIREMENTS DRIVE Normal Mode (Static) Normal Mode (Operational) Using Auto Shutdown Mode ...
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... AD7928 SPECIFICATIONS 2 5.25 V, REF = 2 VDD DRIVE IN Table 3. Parameter DYNAMIC PERFORMANCE Signal-to-(Noise + Distortion) (SINAD) 2 Signal-to-Noise Ratio (SNR) 2 Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise 2 (SFDR) 2 Intermodulation Distortion (IMD) Second-Order Terms Third-Order Terms Aperture Delay Aperture Jitter 2 Channel-to-Channel Isolation ...
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... AD7908/AD7918/AD7928 Parameter LOGIC OUTPUTS Output High Voltage Output Low Voltage Floating-State Leakage Current Floating-State Output Capacitance 3 Output Coding CONVERSION RATE Conversion Time Track-and-Hold Acquisition Time Throughput Rate POWER REQUIREMENTS DRIVE Normal Mode (Static) Normal Mode (Operational) Using Auto Shutdown Mode ...
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... Power-up time from full power-down/auto shutdown mode I 200µ OUTPUT PIN C L 50pF I 200µA OH Figure 2. Load Circuit for Digital Output Timing Specifications Rev Page AD7908/AD7918/AD7928 1 ) and timed from a voltage level of 1.6 V. See Figure DRIVE , quoted in the timing characteristics is the true bus relinquish 8 1.6V ...
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... AD7908/AD7918/AD7928 ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 5. Parameter Rating AV to AGND −0 AGND −0 DRIVE Analog Input Voltage to AGND −0 Digital Input Voltage to AGND −0 Digital Output Voltage to AGND −0 ...
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... MSB first; the data stream from the AD7928 consists of one leading zero, three address bits indicating which channel the conversion result corresponds to, followed by the 12 bits of conversion data, provided MSB first ...
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... Thus for a 12-bit converter, this is 74 dB; for a 10-bit converter, this is 62 dB; and for an 8-bit converter, this is 50 dB. Total Harmonic Distortion Total harmonic distortion (THD) is the ratio of the rms sum of harmonics to the fundamental. For the AD7908/AD7918/ AD7928 defined as: THD where ...
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... TYPICAL PERFORMANCE CHARACTERISTICS PERFORMANCE CURVES Figure 4 shows a typical FFT plot for the AD7928 at 1 MSPS sample rate and 50 kHz input frequency. Figure 5 shows the signal-to-(noise + distortion) ratio performance vs. input frequency for various supply voltages while sampling at 1 MSPS with an SCLK of 20 MHz. ...
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... 5.25V DD –60 – – 50Ω IN – 10Ω IN –80 –85 –90 10 100 INPUT FREQUENCY (kHz) Figure 8. AD7928 THD vs. Analog Input Frequency for Various Source Impedances 1 DRIVE 0.8 TEMPERATURE = 25°C 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –1.0 0 512 1024 1536 ...
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... The control register on the AD7908/AD7918/AD7928 is a 12-bit, write-only register. Data is loaded from the DIN pin of the AD7908/AD7918/AD7928 on the falling edge of SCLK. The data is transferred on the DIN line at the same time that the conversion result is read from the part. The data transferred on the DIN line corresponds to the AD7908/AD7918/AD7928 configuration for the next conversion ...
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... PM0 Mode 1 1 Normal Operation. In this mode, the AD7908/AD7918/AD7928 remain in full power mode regardless of the status of any of the logic inputs. This mode allows the fastest possible throughput rate from the AD7908/AD7918/AD7928 Full Shutdown. In this mode, the AD7908/ AD7918/AD7928 is in full shutdown mode with all circuitry powering down. The AD7908/AD7918/AD7928 retains the information in the control register while in full shutdown ...
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... Sequence One The SHADOW register on the AD7908/AD7918/AD7928 is a 16-bit, write-only register. Data is loaded from the DIN pin of the AD7908/AD7918/AD7928 on the falling edge of SCLK. The data is transferred on the DIN line at the same time that a conversion result is read from the part. This requires 16 serial clock falling edges for the data transfer ...
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... CONVERTER OPERATION The AD7908/AD7918/AD7928 are 8-, 10-, and 12-bit successive approximation analog-to-digital converters based around a capacitive DAC, respectively. The AD7908/AD7918/ AD7928 can convert analog input signals in the range REF × REF IN simplified schematics of the ADC. The ADC is comprised of ...
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... This 16-bit data stream consists of a leading zero, three address bits indicating which channel the conversion result corresponds to, followed by the 12 bits of conversion data for the AD7928 (10 bits of data for the /256 AD7908 AD7918 and 8 bits of data for the AD7908, each followed by ...
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... SHADOW bits are set avoid interrupting the SERIAL INTERFACE automatic conversion sequence. This pattern continues until such time as the AD7908/AD7918/AD7928 is written to and the SEQ and SHADOW bits are configured with any bit combination µC/µP except completion of the sequence, the AD7908/ AD7918/AD7928 sequencer returns to the first selected channel in the SHADOW register and commence the sequence again ...
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... The conversion is initiated on the falling edge of CS and the track-and-hold enters hold mode as described in the Interface AD7928 on the DIN line during the first 12 clock cycles of the data transfer are loaded into the control register (provided WRITE bit is set to 1). If data written to the SHADOW ...
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... Powering Up the AD7908/AD7918/AD7928 When supplies are first applied to the AD7908/AD7918/ AD7928, the ADC can power up in any of the operating modes of the part. To ensure the part is placed into the required operating mode, the user should perform a dummy cycle operation as outlined in Figure 24. ...
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... INVALID DATA DIN KEEP DIN LINE TIED HIGH FOR FIRST TWO DUMMY CONVERSIONS Figure 24. Placing AD7928 into the Required Operating Mode After Supplies are Applied POWER VS. THROUGHPUT RATE By operating in auto shutdown mode on the AD7908/AD7918/ AD7928, the average power consumption of the ADC decreases at lower throughput rates ...
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... SHADOW register takes place on all 16 SCLK falling edges in the next serial transfer, as shown for example on the AD7928 in Figure 29. Two sequence options can be programmed in the SHADOW register. If the user does not want to program a second sequence, then the eight LSBs should be filled with zeros ...
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... SCLK t 3 ADD2 ADD1 DOUT THREE-STATE THREE IDENTIFICATION BITS t ZERO DIN SEQUENCE 1 Figure 29. AD7928 Writing to SHADOW Register Timing Diagram t CONVERT DB7 DB6 DB0 ZERO t 10 ADD1 ADD0 CODING DONTC t CONVERT ...
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... N, then equidistant sampling is implemented by the DSP. AD7908/AD7918/AD7928 to DSP563xx The connection diagram in Figure 32 shows how the AD7908/AD7918/AD7928 can be connected to the synchronous serial interface (ESSI) of the DSP563xx family of DSPs from Motorola. Each ESSI (two on board) is operated in synchronous mode (SYN bit in CRB = 1) with internally generated word length frame sync for both Tx and Rx (Bit FSL1 = 0 and Bit FSL0 = 0 in CRB) ...
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... The analog ground plane should be allowed to run under the AD7908/AD7918/AD7928 to avoid noise coupling. The power supply lines to the AD7908/AD7918/ AD7928 should use as large a trace as possible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching signals, like clocks, should be ...
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... AD7908/AD7918/AD7928 OUTLINE DIMENSIONS COPLANARITY 6.60 6.50 6. 4.50 4.40 4.30 6.40 BSC 1 10 PIN 1 0.65 BSC 1.20 MAX 0.15 0.20 0.05 0.09 0.30 0.19 SEATING 0.10 PLANE COMPLIANT TO JEDEC STANDARDS MO-153-AC Figure 33. 20-Lead Thin Shrink Small Outline Package [TSSOP] (RU-20) Dimensions shown in millimeters Rev Page 0.75 8° 0.60 0° 0.45 ...
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... The EVAL-AD79x8CBZ can be used as a standalone evaluation board or in conjunction with the evaluation controller board for evaluation/demonstration purposes. The board comes with one chip of each the AD7908, AD7918, and AD7928. 4 The EVAL-CONTROL BRD is a complete unit allowing control and communicate with all Analog Devices evaluation boards ending in the CB designators. To order a complete evaluation kit, order the particular ADC evaluation board, such as the EVAL-AD79x8CB, the EVAL-CONTROL BRD2, and transformer ...
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... AD7908/AD7918/AD7928 NOTES Rev Page ...
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... NOTES AD7908/AD7918/AD7928 Rev Page ...
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... AD7908/AD7918/AD7928 NOTES ©2006–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D03089-0-12/10(D) Rev Page ...