AD7866 Analog Devices, AD7866 Datasheet
AD7866
Specifications of AD7866
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AD7866 Summary of contents
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... Shutdown Mode Max 20-Lead TSSOP Package GENERAL DESCRIPTION The AD7866 is a dual 12-bit high speed, low power, successive approximation ADC. The part operates from a single 2 5.25 V power supply and features throughput rates MSPS. The device contains two ADCs, each preceded by a low noise, wide bandwidth track-and-hold amplifier that can handle input frequencies in excess of 10 MHz ...
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... AD7866–SPECIFICATIONS Parameter DYNAMIC PERFORMANCE Signal to Noise + Distortion (SINAD) 2 Total Harmonic Distortion (THD) Peak Harmonic or Spurious Noise (SFDR) 2 Intermodulation Distortion (IMD) Second Order Terms Third Order Terms Channel-to-Channel Isolation SAMPLE AND HOLD 3 Aperture Delay 3 Aperture Jitter 3 Aperture Delay Matching Full Power Bandwidth ...
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... REF CAP CAP –3– AD7866 Test Conditions/Comments 800 ns with SCLK = 20 MHz See Serial Interface Section Digital I/ DRIVE 5.25 V. Add 0 Typical if Using Internal Reference 2 3.6 V. Add 0. Typical if Using Internal Reference. ...
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... AD7866 1 TIMING SPECIFICATIONS Limit at Parameter Unit MIN MAX kHz min SCLK 20 MHz max max CONVERT SCLK 800 ns max max QUIET min max max min 5 SCLK t 0 min 6 SCLK t 10 ...
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... This evaluation board controller is a complete unit, allowing control and communicate with all Analog Devices evaluation boards ending in the CB design ators. To order a complete evaluation kit, the particular ADC evaluation board, e.g., EVAL-AD7866CB, the EVAL-CONTROL BRD2, and transformer must be ordered. See relevant Evaluation Board Technical note for more information. ...
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... AGND Analog Ground. Ground reference point for all analog circuitry on the AD7866. All analog input signals and any external reference signal should be referred to this AGND voltage. Both of these pins should connect to the AGND plane of a system. The AGND and DGND voltages ideally should be at the same potential and must not be more than 0 ...
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... Analog Input Range and Output Coding Selection. Logic input. The polarity on this pin will determine what input range the analog input channels on the AD7866 will have, and will also select the type of output coding the ADC will use for the conversion result. On the falling edge of CS, the polarity of this pin is checked to determine the analog input range of the next conversion ...
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... V REF channels and determining how much that signal is attenuated in the selected channel with a 10 kHz signal ( given is the worst-case across all four channels for the AD7866. PSR (Power Supply Rejection) See the Performance Curves section. –8– /2), excluding dc. The ...
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... AD7866 when there is no decoupling on the supply, while TPCs 4a and 4b show the PSRR with decoupling capacitors of 10 µF and 0.1 µF on the supply. TPCs 5 and 6 show typical DNL and INL plots for the AD7866. TPC 7 shows a graph of the total harmonic distortion versus analog input frequency for various source impedances. ...
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... AD7866 0 100mV p-p SINE WAVE –10 2.5V EXT REFERENCE ON V REF –20 –30 –40 –50 – 2.7V DD –70 – 3.6V DD –90 –100 1k 10k AV RIPPLE FREQUENCY – TPC 4a. PSRR vs. Supply Ripple Frequency, with Supply Decoupling 0 100mV p-p SINE WAVE –10 2 ...
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... Figure 3. ADC Conversion Phase ANALOG INPUT Figure 4 shows an equivalent circuit of the analog input structure of the AD7866. The two diodes, D1 and D2, provide ESD protection for the analog inputs. Care must be taken to ensure REF that the analog input signal never exceeds the supply rails by more than 300 mV ...
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... AD7866 Analog Input Ranges The analog input range for the AD7866 can be selected with either straight binary or twos complement REF REF output coding. The RANGE pin is used to select both the analog input range and the output coding, as shown in Figures ...
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... SCLK RANGE D A OUT D B OUT Figure 8. Selecting Figure 9. Handling Bipolar Signals with the AD7866 111...111 111...110 111...000 1LSB = V 011...111 000...010 000...001 000...000 1LSB 0V ANALOG INPUT Figure 10. Straight Binary Transfer ...
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... AD7866 Digital Inputs The digital inputs applied to the AD7866 are not limited by the maximum ratings that limit the analog inputs. Instead, the digital inputs applied can and are not restricted by the V 0.3 V limit as on the analog inputs. See maximum ratings. ...
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... CAP CAP REF43, and AD1582. MODES OF OPERATION The mode of operation of the AD7866 is selected by controlling the (logic) state of the CS signal during a conversion. There are three possible modes of operation: normal mode, partial power-down mode, and full power-down mode. The point at which CS is pulled high after the conversion has been initiated will determine which power-down mode, if any, the device will enter ...
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... CS line; although the device may begin to power up on the falling edge of CS, it will power down again on the rising edge of CS. If the AD7866 is already in partial power-down mode and CS is brought high between the second and tenth falling edges of SCLK, the device will enter full power-down mode ...
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... OUT REV. A one has the facility to monitor the ADC supply current and thus determine which mode the AD7866 is in) if the ADC powers up in the desired mode of operation and thus a dummy cycle is not required to change mode, then neither is a dummy cycle required to place the track-and-hold into track ...
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... The AD7866 can be said to dissipate 11.4 mW for 2 µs during each conversion cycle and 1.68 mW for the remaining 8 µs when the part is in partial power-down. With a throughput rate of ...
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... OUT tion bits can be interpreted. MICROPROCESSOR INTERFACING The serial interface on the AD7866 allows the parts to be directly connected to a range of many different microprocessors. This section explains how to interface the AD7866 with some of the more common microcontroller and DSP serial interface protocols. ...
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... SCLK0 WL1 = 1 and WL0 = 0 in CRA. To implement the power-down SCLK1 modes on the AD7866, the word length can be changed to eight TFS0 bits by setting bits WL1 = 0 and WL0 = 0 in CRA. The FSP bit in the CRB should be set make the frame sync negative. ...
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... Both AGND pins of the AD7866 should be sunk in the AGND plane. Digital and analog ground planes should be joined at only one place. If the AD7866 system where multiple devices require an AGND to DGND connec- tion, the connection should still be made at one point only, a star ground point that should be established as close as possible to the AD7866 ...
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... AD7866 0.15 0.05 COPLANARITY OUTLINE DIMENSIONS 20-Lead Thin Shrink Small Outline Package [TSSOP] (RU-20) Dimensions shown in millimeters 6.60 6.50 6. 4.50 4.40 4.30 6.40 BSC 1 10 PIN 1 0.65 1.20 BSC MAX 0.20 0.09 0.30 SEATING 0.19 PLANE 0.10 COMPLIANT TO JEDEC STANDARDS MO-153AC –22– 0.75 8 0.60 0 0.45 REV. A ...
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... Sheet changed from REV REV. A. Addition to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Addition to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Changes to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Added text to Analog Input Ranges section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Changes to Figure Changes to POWER VS. THROUGHPUT RATE section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Replaced Figure Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 REV. A –23– AD7866 Page ...
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