AD7676 Analog Devices, AD7676 Datasheet - Page 3
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AD7676
Manufacturer Part Number
AD7676
Description
Manufacturer
Analog Devices
Datasheet
1.AD7676.pdf
(20 pages)
Specifications of AD7676
Resolution (bits)
16bit
# Chan
1
Sample Rate
500kSPS
Interface
Par,Ser,SPI
Analog Input Type
Diff-Uni
Ain Range
(2Vref) p-p
Adc Architecture
SAR
Pkg Type
CSP,QFP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AD7676AST
Manufacturer:
ADI
Quantity:
150
Company:
Part Number:
AD7676ASTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
Part Number:
AD7676ASTZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
AD7676ASTZRL
Manufacturer:
Analog Devices Inc
Quantity:
10 000
TIMING SPECIFICATIONS
Parameter
Refer to Figures 11 and 12
Refer to Figures 13, 14, and 15 (Parallel Interface Modes)
Refer to Figures 16 and 17 (Master Serial Interface Modes)
Refer to Figures 18 and 19 (Slave Serial Interface Modes)
NOTES
1
2
Specifications subject to change without notice.
REV. B
In serial interface modes, the SYNC, SCLK, and SDOUT timings are defined with a maximum load C
In Serial Master Read during Convert Mode, see Table II.
Convert Pulsewidth
Time between Conversions
CNVST LOW to BUSY HIGH Delay
BUSY HIGH All Modes except in Master Serial Read
Aperture Delay
End of Conversion to BUSY LOW Delay
Conversion Time
Acquisition Time
RESET Pulsewidth
CNVST LOW to DATA Valid Delay
DATA Valid to BUSY LOW Delay
Bus Access Request to DATA Valid
Bus Relinquish Time
CS LOW to SYNC Valid Delay
CS LOW to Internal SCLK Valid Delay
CS LOW to SDOUT Delay
CNVST LOW to SYNC Delay
SYNC Asserted to SCLK First Edge Delay
Internal SCLK Period
Internal SCLK HIGH
Internal SCLK LOW
SDOUT Valid Setup Time
SDOUT Valid Hold Time
SCLK Last Edge to SYNC Delay
CS HIGH to SYNC HI-Z
CS HIGH to Internal SCLK HI-Z
CS HIGH to SDOUT HI-Z
BUSY HIGH in Master Serial Read after Convert
CNVST LOW to SYNC Asserted Delay
SYNC Deasserted to BUSY LOW Delay
External SCLK Setup Time
External SCLK Active Edge to SDOUT Delay
SDIN Setup Time
SDIN Hold Time
External SCLK Period
External SCLK HIGH
External SCLK LOW
Convert Mode
2
2
2
2
2
2
(–40 C to +85 C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.)
2
2
1
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Symbol
t
t
t
t
t
t
t
t
t
t
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
–3–
L
of 10 pF; otherwise, the load is 60 pF maximum.
Min
5
2
10
750
10
45
5
3
25
12
7
4
2
3
5
3
5
5
25
10
10
Typ
2
525
See Table I
1.25
25
Max
30
1.25
1.25
1.25
40
15
10
10
10
40
10
10
10
18
AD7676
Unit
ns
µs
ns
µs
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns