AD7723 Analog Devices, AD7723 Datasheet - Page 20

• Manufacturer Part Number: AD7723
• Description: 16-Bit, 1.2 MSPS, CMOS Sigma-Delta ADC
• Manufacturer: Analog Devices

Specifications of AD7723

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 19.2MSPS
• Interface: Par,Ser
• Analog Input Type: Diff-Bip,Diff-Uni
• Ain Range: 4 V p-p,Uni 4.0V
• Adc Architecture: Sigma-Delta
• Pkg Type: QFP

AD7723
APPLYING THE AD7723
ANALOG INPUT RANGE
The AD7723 has differential inputs to provide common-mode
noise rejection. In unipolar mode, the analog input range is 0 to
8/5 × V
±4/5 × V
both modes with 1 LSB = 61 µV. The ideal input/output transfer
characteristics for the two modes are shown in Figure 34. In
both modes, the absolute voltage on each input must remain
within the supply range AGND to AV
allows either single-ended or complementary input signals.
The AD7723 accepts full-scale, in-band signals. However, large
scale out-of-band signals can overload the modulator inputs.
Figure 35 shows the maximum input signal level as a function
of frequency. A minimal single-pole, RC, antialias filter set to
f
spectrum.
011…111
011…110
000…010
000…001
000…000
111…111
111…110
100…001
100…000
CLKIN
/24 allows full-scale input signals over the entire frequency
2.2
2.1
2.0
1.9
1.8
1.7
1.6
1.5
1.4
1.3
–4/5 × V
REF2
REF2
0
Figure 35. Peak Input Signal Level vs. Signal Frequency
Figure 34. Bipolar (Unipolar) Mode Transfer Function
(0V)
, while in bipolar mode, the analog input range is
. The output code is twos complement binary in
REF2
V
0.02
INPUT SIGNAL FREQUENCY RELATIVE TO
REF
= 2.5V
0.04
(+4/5 × V
0.06
0V
REF2
0.08
)
DD
0.10
(+8/5 × V
+4/5 × V
. The bipolar mode
0.12
REF2
REF2
f
CLKIN
– 1LSB BIPOLAR
– 1LSB) UNIPOLAR
0.14
0.5
Rev. C | Page 20 of 32
ANALOG INPUT
The analog input of the AD7723 uses a switched capacitor
technique to sample the input signal. For the purpose of driving
the AD7723, an equivalent circuit of the analog inputs is shown
in Figure 36. For each half clock cycle, two highly linear
sampling capacitors are switched to both inputs, converting the
input signal into an equivalent sampled charge. A signal source
driving the analog inputs must be able to source this charge
while also settling to the required accuracy by the end of each
half-clock phase.
DRIVING THE ANALOG INPUTS
To interface the signal source to the AD7723, at least one op
amp is generally required. Choice of op amp is critical to
achieving the full performance of the AD7723. The op amp not
only has to recover from the transient loads that the ADC
imposes on it, but it must also have good distortion
characteristics and very low input noise. Resistors in the signal
path can also add to the overall thermal noise floor,
necessitating the choice of low value resistors.
Placing an RC filter between the drive source and the ADC
inputs, as shown in Figure 37, has a number of beneficial
effects. Transients on the op amp outputs are significantly
reduced because the external capacitor now supplies the
instantaneous charge required when the sampling capacitors are
switched to the ADC input pins and input circuit noise at the
sample images is now significantly attenuated, resulting in
improved overall SNR. The external resistor serves to isolate the
external capacitor from the ADC output, thus improving op
amp stability while also isolating the op amp output from any
remaining transients on the capacitor. By experimenting with
different filter values, the optimum performance can be
achieved for each application. As a guideline, the RC time
constant (R × C) should be less than a quarter of the clock
period to avoid nonlinear currents from the ADC inputs being
stored on the external capacitor and degrading distortion. This
restriction means that this filter cannot form the main antialias
filter for the ADC.
VIN(+)
VIN(–)
Figure 36. Analog Input Equivalent Circuit
20
19
500Ω
500Ω
CLKIN
ΦA
ΦB
ΦA
ΦB
Φ
A
Φ
B
Φ
A
Φ
2pF
2pF
GROUND
B
AD7723
AC