AD7723 Analog Devices, AD7723 Datasheet - Page 23

• Manufacturer Part Number: AD7723
• Description: 16-Bit, 1.2 MSPS, CMOS Sigma-Delta ADC
• Manufacturer: Analog Devices

Specifications of AD7723

• Resolution (bits): 16bit
• # Chan: 1
• Sample Rate: 19.2MSPS
• Interface: Par,Ser
• Analog Input Type: Diff-Bip,Diff-Uni
• Ain Range: 4 V p-p,Uni 4.0V
• Adc Architecture: Sigma-Delta
• Pkg Type: QFP

SYSTEM SYNCHRONIZATION
The SYNC input provides a synchronization function for use in
parallel or serial mode. SYNC allows the user to begin gathering
samples of the analog input from a known point in time.
This allows a system using multiple AD7723s, operated from a
common master clock, to be synchronized so that each ADC
simultaneously updates its output register.
In a system using multiple AD7723s, a common signal to their
sync inputs synchronizes their operation. On the rising edge of
SYNC, the digital filter sequencer is reset to 0. The filter is held
in a reset state until a rising edge on CLKIN senses SYNC low.
A SYNC pulse, one CLKIN cycle long, can be applied
synchronous to the falling edge of CLKIN. This way, on the
next rising edge of CLKIN, SYNC is sensed low, the filter is
taken out of its reset state, and multiple parts begin to gather
input samples.
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Following a SYNC, the modulator and filter need time to settle
before data can be read from the AD7723. DRDY goes high
following a synchronization and it remains high until valid data
is available at the interface.
When operating in any of the serial modes, either SYNC or
frame sync input (FSI) may be used to synchronize multiple
AD7723 devices to a common master clock. The functionality
of FSI is detailed in the Serial Interface section.
AD7723