AD9240 Analog Devices, AD9240 Datasheet - Page 10

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AD9240

Manufacturer Part Number
AD9240
Description
Complete 14-Bit, 10 MSPS Monolithic A/D Converter
Manufacturer
Analog Devices
Datasheet

Specifications of AD9240

Resolution (bits)
14bit
# Chan
1
Sample Rate
10MSPS
Interface
Par
Analog Input Type
Diff-Uni,SE-Uni
Ain Range
(2Vref) p-p,2 V p-p,5V p-p,Uni (Vref) x 2,Uni 2.0V,Uni 5.0V
Adc Architecture
Pipelined
Pkg Type
QFP

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AD9240
Figure 27 compares the AD9240’s THD vs. frequency perfor-
mance for a 2 V input span with a common-mode voltage of
1 V and 2.5 V. Note the difference in the amount of degrada-
tion in THD performance as the input frequency increases.
Similarly, note how the THD performance at lower frequencies
becomes less sensitive to the common-mode voltage. As the
input frequency approaches dc, the distortion will be domi-
nated by static nonlinearities such as INL and DNL. It is
important to note that these dc static nonlinearities are inde-
pendent of any R
Due to the high degree of symmetry within the SHA topology, a
significant improvement in distortion performance for differen-
tial input signals with frequencies up to and beyond Nyquist can
be realized. This inherent symmetry provides excellent cancella-
tion of both common-mode distortion and noise. Also, the
required input signal voltage span is reduced a factor of two
which further reduces the degree of R
effects on distortion.
The optimum noise and dc linearity performance for either
differential or single-ended inputs is achieved with the largest
input signal voltage span (i.e., 5 V input span) and matched
input impedance for VINA and VINB. Note that only a slight
degradation in dc linearity performance exists between the
2 V and 5 V input span as specified in the AD9240 DC
SPECIFICATIONS.
Referring to Figure 24, the differential SHA is implemented
using a switched-capacitor topology. Hence, its input imped-
ance and its subsequent effects on the input drive source should
be understood to maximize the converter’s performance. The
combination of the pin capacitance, C
C
16 pF. When the SHA goes into track mode, the input source
must charge or discharge the voltage stored on C
input voltage. This action of charging and discharging C
is approximately 4 pF, averaged over a period of time and for a
given sampling frequency, F
pear to have a benign resistive component (i.e., 83 k at F
10 MSPS). However, if this action is analyzed within a sam-
pling period (i.e., T = <1/F
due to the instantaneous requirement of charging and discharg-
ing C
and the SHA input as shown in Figure 28 provides effective
isolation.
Figure 27. THD vs. Frequency for V
(A
PAR,
IN
S
= –0.5 dB, Input Span = 2.0 V p-p)
and the sampling capacitance, C
. A series resistor inserted between the input drive source
–50
–60
–70
–80
–90
0.1
ON
modulation.
FREQUENCY – MHz
S
S
), the input impedance is dynamic
, makes the input impedance ap-
1
V
CM
= 1.0V
ON
PIN
CM
S
V
, is typically less than
CM
modulation and its
, parasitic capacitance
= 2.5 V and 1.0 V
= 2.5V
S
10
to the new
20
S
which
S
=
–10–
The optimum size of this resistor is dependent on several fac-
tors, which include the AD9240 sampling rate, the selected op
amp and the particular application. In most applications, a
30
may require a larger resistor value to reduce the noise band-
width or possibly limit the fault current in an overvoltage
condition. Other applications may require a larger resistor value
as part of an antialiasing filter. In any case, since the THD
performance is dependent on the series resistance and the above
mentioned factors, optimizing this resistor value for a given
application is encouraged.
A slight improvement in SNR performance and dc offset
performance is achieved by matching the input resistance con-
nected to VINA and VINB. The degree of improvement is de-
pendent on the resistor value and the sampling rate. For series
resistor values greater than 100 , the use of a matching resis-
tor is encouraged.
The noise or small-signal bandwidth of the AD9240 is the same
as its full-power bandwidth. For noise sensitive applications, the
excessive bandwidth may be detrimental and the addition of a
series resistor and/or shunt capacitor can help limit the wide-
band noise at the A/D’s input by forming a low-pass filter. Note,
however, that the combination of this series resistance with the
equivalent input capacitance of the AD9240 should be evalu-
ated for those time-domain applications that are sensitive to the
input signal’s absolute settling time. In applications where har-
monic distortion is not a primary concern, the series resistance
may be selected in combination with the SHA’s nominal 16 pF
of input capacitance to set the filter’s 3 dB cutoff frequency.
A better method of reducing the noise bandwidth, while possi-
bly establishing a real pole for an antialiasing filter, is to add
some additional shunt capacitance between the input (i.e.,
VINA and/or VINB) and analog ground. Since this additional
shunt capacitance combines with the equivalent input capaci-
tance of the AD9240, a lower series resistance can be selected to
establish the filter’s cutoff frequency while not degrading the
distortion performance of the device. The shunt capacitance
also acts as a charge reservoir, sinking or sourcing the additional
charge required by the hold capacitor, C
current transients seen at the op amp’s output.
The effect of this increased capacitive load on the op amp driv-
ing the AD9240 should be evaluated. To optimize performance
when noise is the primary consideration, increase the shunt
capacitance as much as the transient response of the input signal
will allow. Increasing the capacitance too much may adversely
affect the op amp’s settling time, frequency response and distor-
tion performance.
Figure 28. Series Resistor Isolates Switched-Capacitor
SHA Input from Op Amp. Matching Resistors Improve
SNR Performance
to 50
V
V
CC
EE
resistor is sufficient; however, some applications
*OPTIONAL SERIES RESISTOR
10 F
R
S
*
0.1 F
R
S
*
VINA
VINB
VREF
SENSE
REFCOM
H
, further reducing
AD9240
REV.
B

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