AD7851 Analog Devices, AD7851 Datasheet - Page 20

• Manufacturer Part Number: AD7851
• Description: 14-Bit, 333 kSPS, Serial Sampling A/D Converter
• Manufacturer: Analog Devices

Specifications of AD7851

• Resolution (bits): 14bit
• # Chan: 1
• Sample Rate: 333kSPS
• Interface: Ser,SPI
• Analog Input Type: Diff-Uni
• Ain Range: (Vref) p-p,Uni (Vref)
• Adc Architecture: SAR
• Pkg Type: DIP,SOIC,SOP

AD7851
POWER-UP TIMES
Using an External Reference
When the AD7851 is powered up, the part is powered up
from one of two conditions: first, when the power supplies
are initially powered up and; secondly, when the parts are
powered up from either a hardware or software power-down
(see previous section).
When AV
mode whereby the CONVST signal initiates a timeout followed
by a self-calibration. The total time taken for this timeout and
calibration is approximately 35 ms (see the Automatic Calibra-
tion on Power-On section). During power-up, the functionality
of the SLEEP pin is disabled, that is, the part will not power
down until the end of the calibration if SLEEP is tied logic low.
The power-up calibration mode can be disabled if the user
writes to the control register before a CONVST signal is applied. If
the timeout and self-calibration are disabled, then the user
must take into account the time required by the AD7851 to
power up before a self-calibration is carried out. This power-up
time is the time taken for the AD7851 to power up when
power is first applied (300 µs typ), or the time it takes the exter-
nal reference to settle to the 14-bit level—whichever is longer.
The AD7851 powers up from a full hardware or software
power-down in 5 µs typ. This limits the throughput which the
part is capable of to 120 kSPS for the K Grade and 126 kSPS
for the A Grade when powering down between conversions.
Figure 24 shows how power-down between conversions is
implemented using the CONVST pin. The user first selects
the power-down between conversions option by using the
SLEEP pin and the power management bits, PMGT1 and
PMGT0, in the control register (see previous section). In this
mode, the AD7851 automatically enters a full power-down at
the end of a conversion, that is, when BUSY goes low. The
falling edge of the next CONVST pulse causes the part to
power up. Assuming the external reference is left powered up,
the AD7851 should be ready for normal operation 5 µs after
this falling edge. The rising edge of CONVST initiates a con-
version so the CONVST pulse should be at least 5 µs wide.
The part automatically powers down on completion of the
conversion. Where the software convert start is used, the part
may be powered up in software before a conversion is initiated.
Using the Internal (On-Chip) Reference
As in the case of an external reference, the AD7851 can power
up from one of two conditions: power up after the supplies are
connected or power up from a hardware/software power-down.
CONVST
Figure 24. Using the CONVST Pin to Power Up for
a Conversion
BUSY
DD
START CONVERSION ON RISING EDGE
and DV
POWER UP ON FALLING EDGE
POWER-UP
TIME
5 s
DD
are powered up, the AD7851 enters a
OPERATION
t
NORMAL
CONVERT
3.25 s
POWER-DOWN
FULL
POWER-UP
TIME
–20–
When using the on-chip reference and powering up when AV
and DV
power-up calibration mode be disabled as explained previously.
When using the on-chip reference, the power-up time is effec-
tively the time it takes to charge up the external capacitor on the
REF
where R ≈ 150K and C = external capacitor.
The recommended value of the external capacitor is 100 nF;
this gives a power-up time of approximately 135 ms before a
calibration is initiated and normal operation should commence.
When C
software power-down reduces to 5 µs. This is because an internal
switch opens to provide a high impedance discharge path for the
reference capacitor during power-down—see Figure 25. An added
advantage of the low charge leakage from the reference capacitor
during power-down is that even though the reference is being pow-
ered down between conversions, the reference capacitor holds the
reference voltage to within 0.5 LSBs with throughput rates of 100
samples/second and over with a full power-down between conver-
sions. A high input impedance op amp, such as the AD707, should
be used to buffer this reference capacitor if it is being used exter-
nally. Note, if the AD7851 is left in its powered-down state for
more than 100 ms, the charge on C
the power-up time will increase. If this long power-up time is a
problem, the user can use a partial power-down for the last conver-
sion so the reference remains powered up.
POWER VS. THROUGHPUT RATE
The main advantage of a full power-down after a conversion is
that it significantly reduces the power consumption of the part
at lower throughput rates. When using this mode of operation,
the AD7851 is only powered up for the duration of the conver-
sion. If the power-up time of the AD7851 is taken to be 5 µs
and it is assumed that the current during power up is 12 mA
typ, then power consumption as a function of throughput can
easily be calculated. The AD7851 has a conversion time of
3.25 µs with a 6 MHz external clock. This means the AD7851
consumes 12 mA typ for 8.25 µs in every conversion cycle if the
parts are powered down at the end of a conversion. The graph
in Figure 26 shows the power consumption of the AD7851 as a
function of throughput. Table VII lists the power consump-
tion for various throughput rates.
Figure 25. On-Chip Reference During Power-Down
IN
CAPACITOR
EXTERNAL
/REF
DD
REF
REF
IN
are first connected, it is recommended that the
is fully charged, the power-up time from a hardware or
OUT
/REF
OUT
pin. This time is given by the equation
DURING POWER-DOWN
SWITCH OPENS
t
UP
= 9 × R × C
BUF
REF
will start to leak away and
REFERENCE
CIRCUITRY
TO OTHER
AD7851
ON-CHIP
REV. B
DD