AD8804 Analog Devices, AD8804 Datasheet - Page 2

• Manufacturer Part Number: AD8804
• Description: 12 Channel, 8-Bit TrimDACs with Power Shutdown & Separate VREFL Input
• Manufacturer: Analog Devices

Specifications of AD8804

• Resolution (bits): 8bit
• Dac Update Rate: 1.7MSPS
• Dac Settling Time: 600ns
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Voltage Out
• Dac Input Format: Ser,SPI

AD8802/AD8804–SPECIFICATIONS
Parameter
STATIC ACCURACY
Specifications apply to all DACs
REFERENCE INPUT
DIGITAL INPUTS
POWER SUPPLIES
DYNAMIC PERFORMANCE
SWITCHING CHARACTERISTICS
NOTES
1
2
3
4
5
6
Specifications subject to change without notice.
Typicals represent average readings at +25 C.
V
Guaranteed by design and not subject to production test.
Digital Input voltages V
Measured at a V
See timing diagram for location of measured values. All input control voltages are specified with t
1.6 V.
REFH
Resolution
Differential Nonlinearity Error
Integral Nonlinearity Error
Full-Scale Error
Zero Code Error
DAC Output Resistance
Output Resistance Match
Voltage Range
REFH Input Resistance
REFL Input Resistance
Reference Input Capacitance
Logic High
Logic Low
Logic High
Logic Low
Input Current
Input Capacitance
Power Supply Range
Supply Current (CMOS)
Supply Current (TTL)
Shutdown Current
Power Dissipation
Power Supply Sensitivity
V
Crosstalk
Input Clock Pulse Width
Data Setup Time
Data Hold Time
CS Setup Time
CS High Pulse Width
Reset Pulse Width
CLK Rise to CS Rise Hold Time
CS Rise to Clock Rise Setup
OUT
can be any value between GND and V
Settling Time
OUT
2
pin where an adjacent V
3
4
IN
= 0 V or V
3
3
3
DD
for CMOS condition. DAC outputs unloaded. P
OUT
3, 6
DD
, for the AD8804 V
pin is making a full-scale voltage change (f = 100 kHz).
Symbol
N
DNL
INL
G
V
R
V
V
R
R
C
C
V
V
V
V
I
C
V
I
I
I
P
PSRR
t
CT
t
t
t
t
t
t
t
t
IL
DD
DD
REFH
S
CH
DS
DH
CSS
CSW
RS
CSH
CS1
R/R
DISS
ZSE
OUT
REFH
REFL
REFH
REFL
IH
IL
IH
IL
DD
REF0
REF1
IL
FSE
, t
Range
O
CL
REFL
Conditions
Guaranteed Monotonic
Pin Available on AD8804 Only
Digital Inputs = 55
Digital Inputs = 55
Digital Inputs all Zeros
Digital Inputs all Ones
V
V
V
V
V
V
V
SHDN = 0
V
V
Between Adjacent Outputs
Clock Level High or Low
DD
DD
DD
DD
IN
IH
IH
IH
DD
1/2 LSB Error Band
can be any value between GND and V
= 0 V or + 5 V
= V
= 2.4 V or V
= V
= +5 V
= +5 V
= +3 V
= +3 V
= +5 V
DD
DD
–2–
or V
or V
(V
10%
T
DD
IL
IL
A
DISS
IL
= 0 V
= 0 V, V
= +3 V
= 0.8 V, V
H
H
+85 C unless otherwise noted)
is calculated from (I
, V
, V
R
REFH
REFL
= t
DD
F
5
= 2 ns (10% to 90% of V
= V
10% or +5 V
= V
DD
= +5.5 V
DD
DD
= +5.5 V
DD
.
DD
V
DD
10%, V
).
Min
8
–1
–1.5
–1
–1
3
0
0
2.4
2.1
2.7
15
5
5
10
10
90
20
10
DD
) and timed from a voltage level of
REFH
Typ
1/2
1/4
5
1.5
1.2
1.2
32
32
5
0.01
1
0.2
0.001
0.6
50
= +V
1/4
1/2
1
DD
, V
Max
+1
+1.5
+1
+1
8
V
V
0.8
0.6
5.5
10
4
10
55
0.002
REFL
DD
DD
1
= 0 V, –40 C
REV. 0
Units
Bits
LSB
LSB
LSB
LSB
k
%
V
V
k
k
pF
pF
V
V
V
V
pF
V
mA
%/%
dB
ns
ns
ns
ns
ns
ns
ns
ns
A
A
A
W
s