DAC8222 Analog Devices, DAC8222 Datasheet

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DAC8222

Manufacturer Part Number
DAC8222
Description
Dual 12-Bit Double-Buffered Multiplying CMOS D/A Converter
Manufacturer
Analog Devices
Datasheet

Specifications of DAC8222

Resolution (bits)
12bit
Dac Update Rate
1MSPS
Dac Settling Time
1µs
Max Pos Supply (v)
+15.75V
Single-supply
Yes
Dac Type
Current Out
Dac Input Format
Par

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a
GENERAL DESCRIPTION
The DAC8222 is a dual 12-bit, double-buffered, CMOS digital-
to-analog converter. It has a 12-bit wide data port that allows a
12-bit word to be loaded directly. This achieves faster through-
put time in stand-alone systems or when interfacing to a 16-bit
processor. A common 12-bit input TTL/CMOS compatible
data port is used to load the 12-bit word into either of the two
DACs. This port, whose data loading is similar to that of a RAM’s
write cycle, interfaces directly with most 12-bit and 16-bit bus
systems. (See DAC8248 for a complete 8-bit data bus interface
product.) A common bus allows the DAC8222 to be packaged
in a narrow 24-lead 0.3" DIP and save PCB space.
The DAC is controlled with two signals, WR and LDAC. With
logic low at these inputs, the DAC registers become transparent.
This allows direct unbuffered data to flow directly to either
DAC output selected by DAC A/DAC B. Also, the DAC’s
Multiplying CMOS D/A Converter
double-buffered digital inputs will allow both DACs to be
simultaneously updated.
DAC8222’s monolithic construction offers excellent DAC-to-
DAC matching and tracking over the full operating tempera-
ture range. The chip consists of two thin-film R-2R resistor
ladder networks, four 12-bit registers, and DAC control logic
circuitry. The device has separate reference-input and feedback
resistors for each DAC and operates on a single supply from
+5 V to +15 V. Maximum power dissipation at +5 V using
zero or V
The DAC8222 is manufactured with highly stable thin-film re-
sistors on an advanced oxide-isolated, silicon-gate, CMOS
technology. Improved latch-up resistant design eliminates the
need for external protective Schottky diodes.
Dual 12-Bit Double-Buffered
DD
logic levels is less than 0.5 mW.
FUNCTIONAL DIAGRAM
DAC8222

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DAC8222 Summary of contents

Page 1

... DAC8248 for a complete 8-bit data bus interface product.) A common bus allows the DAC8222 to be packaged in a narrow 24-lead 0.3" DIP and save PCB space. The DAC is controlled with two signals, WR and LDAC. With logic low at these inputs, the DAC registers become transparent ...

Page 2

... WR, LDAC = 0 V; DB0–DB11 = + REF A Endpoint Linearity Error DAC8222A/E/G DAC8222F/H All Grades are Guaranteed Monotonic DAC8222A/E DAC8222G DAC8222F/H (Notes 2, 7) All Digital Inputs = T = +25°C A 0000 0000 0000 T = Full Temp. Range A (Note ...

Page 3

... ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the DAC8222 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. 24-Lead 0.3" ...

Page 4

... DB4 14. DB3 15. DB2 16. DB1 17. DB0 (LSB) 18. DAC A/DAC B 19. LDAC 20 22. V REF B 23 24. I OUT + DAC8222G Limit Units ± 1 LSB max ± 1 LSB max ± 4 LSB max ± max 8/15 kΩ max ± max 2.4 V min 13.5 V min 0.8 V max 1 ...

Page 5

... TYPICAL PERFORMANCE CHARACTERISTICS ° ° ° DAC8222 ...

Page 6

... DAC8222 TYPICAL PERFORMANCE CHARACTERISTICS ...

Page 7

... GENERAL CIRCUIT DESCRIPTION CONVERTER SECTION The DAC8222 contains four 12-bit registers (two input regis- ters and two DAC registers), two highly stable thin-film R-2R resistor ladder networks, and interface control logic circuitry. Also included are 24 single-pole, double-throw, NMOS transis- tor current switches ...

Page 8

... TTL and CMOS input logic levels into voltage levels to drive the internal circuitry. The digital inputs are TTL compatible at V terminal. The +15 V. The DAC8222 can use +5 V CMOS logic levels FB DD with V = +12 V; however, supply current will rise to approxi- DD mately 5 mA– ...

Page 9

... The first two cycles load both DACs as above, and the third cycle updates the outputs. The LDAC and DAC A/DAC B control pins can be tied to- gether and controlled with a single strobe. When using the DAC in this configuration, DAC B must be loaded first. DAC8222 DAC B Input Register DAC Register LATCHED ...

Page 10

... REF BIPOLAR OPERATION The bipolar (offset binary) four-quadrant operation configura- tion using the DAC8222 is shown in Figure 25 and the corre- sponding code in Table III. The circuit makes use of the OP470 a quad op amp (use four OP42s for higher speeds). Resistors R1, R2, R3, and R4 may be omitted and full-scale output voltage may be adjusted by varying and R8 ...

Page 11

... R5 (R8 for DAC B). Full-scale can also be adjusted by  1 varying V  2048  2048  2048 DAC8222 ( equals R1, R2 (R3, OUTA OUT can be adjusted OUT . Full-scale output is equal to V minus one LSB. REF REF ...

Page 12

... AGND and DGND. from + + POWER SUPPLY DECOUPLING Power supplies used with the DAC8222 should be well filtered and regulated. Local supply decoupling consisting µ µF tantalum capacitor in parallel with a 0.1 µF ceramic is highly recommended. The capacitors should be connected be- tween the V and DGND pins and at the device socket ...

Page 13

... BASIC APPLICATIONS PROGRAMMING WINDOW DETECTOR Figure 28 shows the DAC8222 used in a programmable window detector configuration. The required upper and lower limits for the test are loaded into DAC A and DAC signal at the test input is not within the programmed limits, the output will indicate a logic zero ...

Page 14

... DAC8222 ...

Page 15

Cerdip (Q-24) 0.005 (0.13) MIN 0.098 (2.49) MAX 24 13 0.310 (7.87) 0.220 (5.59 PIN 1 0.060 (1.52) 1.280 (32.51) MAX 0.015 (0.38) 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.100 (2.54) 0.070 (1.78) BSC ...

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