DAC8222 Analog Devices, DAC8222 Datasheet - Page 7

• Manufacturer Part Number: DAC8222
• Description: Dual 12-Bit Double-Buffered Multiplying CMOS D/A Converter
• Manufacturer: Analog Devices

Specifications of DAC8222

• Resolution (bits): 12bit
• Dac Update Rate: 1MSPS
• Dac Settling Time: 1µs
• Max Pos Supply (v): +15.75V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Par

PARAMETER DEFINITIONS
RESOLUTION (n)
The resolution of a DAC is the number of states (2
the full-scale range (FSR) is divided (or resolved); where n is
equal to the number of bits.
RELATIVE ACCURACY (INL)
Relative accuracy, or integral nonlinearity, is the maximum de-
viation of the analog output (from the ideal) from a straight line
drawn between the end points. It is expressed in terms of least
significant bit (LSB), or as a percent of full scale.
DIFFERENTIAL NONLINEARITY (DNL)
Differential nonlinearity is the worst case deviation of any adja-
cent analog output from the ideal 1 LSB step size. The devia-
tion of the actual “step size” from the ideal step size of 1 LSB is
called the differential nonlinearity error or DNL. DACs with
DNL greater than ± 1 LSB may be nonmonotonic ± 1/2 LSB
INL guarantees monotonicity and ± 1 LSB maximum DNL.
GAIN ERROR (G
Gain error is the difference between the actual and the ideal
analog output range, expressed as a percent of full-scale or in
terms of LSB value. It is the deviation in slope of the DAC
transfer characteristic from ideal.
See Orientation in Digital-to-Analog Converters Section of the
current data book, for additional parameter definitions.
GENERAL CIRCUIT DESCRIPTION
CONVERTER SECTION
The DAC8222 contains four 12-bit registers (two input regis-
ters and two DAC registers), two highly stable thin-film R-2R
resistor ladder networks, and interface control logic circuitry.
Also included are 24 single-pole, double-throw, NMOS transis-
tor current switches.
FSE
)
n
) into which
Figure 19 shows a simplified circuit for the R-2R ladder network
and transistor switches for one DAC. R is typically 11 kΩ. The
transistor switches are binarily scaled in size to maintain a con-
stant voltage drop across each switch. Figure 20 shows a single
NMOS transistor switch.
The binary-weighted currents are switched between I
AGND by the N-channel MOS transistor switches. The selec-
tion between I
code. It is important to note here that the voltage difference
OUT
and AGND is determined by the digital input
DAC8222
OUT
and