ADM8690 Analog Devices, ADM8690 Datasheet - Page 17

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ADM8690

Manufacturer Part Number
ADM8690
Description
µP Supervisory Circuit, 8-Pin DIP
Manufacturer
Analog Devices
Datasheet

Specifications of ADM8690

Batt-backup-flg
Yes
Product Description
uP Supv Ckt, Watchdog Timer, Backup Battery Switching, 4.65V Reset Trip Voltage, 8-Pin DIP & SOIC
Reset Threshold (v)
4.65
Min Reset Timeout (ms)
35
Reset Output-stage
Active-Low/Push-Pull
Backup-battery Switch
Yes
Chip Enable Gating
---
Typ Watchdog Timeout (ms)
100,1600
Package
DIP,SOIC
Us Price 1000-4999
n/a
Data Sheet
BATTERY
TYPICAL APPLICATIONS
ADM8690
Figure 30 shows the
battery backup application. V
Under normal operating conditions with V
is internally connected to V
decays and V
power for the CMOS RAM. A RESET pulse is also generated
when V
low for 50 ms after V
The watchdog timer input (WDI) monitors an input/output
line from the microprocessor system. This line must be toggled
once every 1.6 sec to verify correct software execution. Failure
to toggle the line indicates that the microprocessor system is
not correctly executing its program and may be tied up in an
endless loop. If this happens, a reset pulse is generated to
initialize the microprocessor.
If the watchdog timer is not needed, the WDI input should be
left floating.
The power-fail input, PFI, monitors the input power supply via
a resistive divider network. The voltage on the PFI input is
compared with a precision 1.3 V internal reference. If the input
voltage drops below 1.3 V, a power-fail output ( PFO ) signal is
generated. This signal warns of an impending power failure and
can be used to interrupt the processor so that the system can be
shut down in an orderly fashion. The resistors in the sensing
network are ratioed to give the desired power-fail threshold
voltage (V
5V
V
R1/R2 = (V
R1
R2
T
+
CC
= (1.3 R1/R2) + 1.3 V
T
falls below 4.65 V for the ADM8690. RESET remains
).
Figure 30.
OUT
APPLICATIONS
PFI
V
BATT
ADM8690
T
is switched to V
/1.3) − 1
GND
V
CC
ADM8690
ADM8690
CC
RESET
V
PFO
WDI
returns to 5 V.
OUT
CC
Typical Application, Circuit A
OUT
. If a power failure occurs, V
in a typical power monitoring,
0.1µF
BATT
powers the CMOS RAM.
, thereby maintaining
CMOS RAM
POWER
RESET
NMI
I/O LINE
MICROPROCESSOR
CC
present, V
SYSTEM
POWER
OUT
CC
Rev. C | Page 17 of 24
Figure 31 shows a similar application, but in this case the PFI
input monitors the unregulated input to the 7805 voltage regu-
lator. This circuit provides an earlier warning of an impending
power failure. It is useful with processors that operate at low
speeds or where there are a significant number of housekeeping
tasks to be completed before the power is lost.
ADM8691/ADM8695
Figure 32 shows a typical connection for the ADM8691/ADM8695.
CMOS RAM is powered from V
this voltage is routed to V
V
required, an external PNP transistor can be added. When V
higher than V
to 35 mA of base drive for the external transistor. A 0.1 μF capac-
itor is connected to V
CMOS RAM. When V
MOSFET connects the backup battery to V
INPUT POWER
5V
POWER
R1
R2
INPUT
V > 8V
OUT
BATTERY
BATTERY
can supply up to 100 mA from V
3V
NC
R1
R2
0.1µF
Figure 32.
Figure 31.
7805
+
BATT
V
GND
OSC IN
OSC SEL
PFI
BATT
ADM8690/ADM8691/ADM8695
V
LOW LINE
, the BATT ON output goes low, providing up
PFI
V
CC
ADM8691/
SYSTEM STATUS
ADM8695
BATT
ADM8690
ADM8691/ADM8695
INDICATORS
ADM8690
OUT
BATT
GND
V
ON
CC
CC
5V
RESET
OUT
to supply the transient currents for
is lower than V
WDO
V
PFO
WDI
RESET
CE
OUT
APPLICATIONS
V
. If V
CE
PFO
WDI
OUT
Typical Application, Circuit B
OUT
IN
OUT
CC
0.1µF
0.1µF
. When 5 V power is present,
fails, V
RESET
0.1µF
Typical Application
CC
ADDRESS
DECODE
CMOS
CMOS RAM
POWER
RESET
NMI
I/O LINE
, but if more current is
BATT
RAM
BATT
OUT
MICROPROCESSOR
0.1µF
, an internal 20 Ω
is routed to V
.
SYSTEM
MICROPROCESSOR
I/O LINE
NMI
RESET
POWER
A0 TO A15
SYSTEM
OUT
CC
is
.

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