ADM1192 Analog Devices, ADM1192 Datasheet - Page 12

• Manufacturer Part Number: ADM1192
• Description: Digital Power Monitor with Clear Pin and ALERT Output
• Manufacturer: Analog Devices

Specifications of ADM1192

• Max Pos Supply (v): +26V
• Current Monitoring: 2
• Glitch Filter: Programmable Timer
• Clrb Pin: X
• Alert/alertb: ALERT
• Number Of I2c Addresses: 4
• Package: MSOP

ADM1192
WRITE AND READ OPERATIONS
The I
types of read and write operations. The operations used in the
ADM1192 are discussed in this section. Table 6 shows the
abbreviations used in the command diagrams (see Figure 21
to Figure 26).
Table 6. I
Abbreviation
S
P
R
W
A
N
QUICK COMMAND
The quick command operation allows the master to check if the
slave is present on the bus, as follows:
1.
2.
3.
4.
Table 7. Command Byte Operations
Bit
C0
C1
C2
C3
C4
C5
C6
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address, followed by the
write bit (low).
The addressed slave device asserts an acknowledge on SDA.
The master asserts a stop condition on SDA to end the
transaction.
2
Default
0
0
0
0
0
0
0
C specification defines several protocols for different
2
C Abbreviations
Name
V_CONT
V_ONCE
I_CONT
I_ONCE
VRANGE
N/A
STATUS_RD
Figure 21. Quick Command
1
S
ADDRESS W A
SLAVE
2
Function
LSB, set to convert voltage continuously. If readback is attempted before the first conversion is complete,
the ADM1192 asserts an acknowledge and returns all 0s in the returned data.
Set to convert voltage once. Self-clears. I
conversion is complete.
Set to convert current continuously. If readback is attempted before the first conversion is complete,
the ADM1192 asserts an acknowledge and returns all 0s in the returned data.
Set to convert current once. Self-clears. I
conversion is complete.
Selects different internal attenuation resistor networks for voltage readback. A 0 in C4 selects a 14:1 voltage
divider. A 1 in C4 selects a 7:2 voltage divider. With an ADC full scale of 1.902 V, the voltage at the VCC pin for
an ADC full-scale result is 26.52 V for VRANGE = 0 and 6.65 V for VRANGE = 1.
Unused.
Status Read. When this bit is set, the data byte read back from the ADM1192 is the status byte. This contains
the status of the device alerts. See Table 15 for full details of the status byte.
Condition
Start
Stop
Read
Write
Acknowledge
No acknowledge
3
4
P
Rev. B | Page 12 of 20
2
2
C asserts a no acknowledge on attempted reads until the ADC
C asserts a no acknowledge on attempted reads until the ADC
WRITE COMMAND BYTE
In the write command byte operation, the master device sends
a command byte to the slave device, as follows:
1.
2.
3.
4.
5.
6.
The seven LSBs of the command byte are used to configure and
control the ADM1192. Table 7 provides details of the function
of each bit.
The master device asserts a start condition on SDA.
The master sends the 7-bit slave address, followed by the
write bit (low).
The addressed slave device asserts an acknowledge on SDA.
The master sends the command byte. The command byte
is identified by an MSB = 0. An MSB = 1 indicates an
extended register write (see the Write Extended Command
Byte section).
The slave asserts an acknowledge on SDA.
The master asserts a stop condition on SDA to end the
transaction.
1
S
Figure 22. Write Command Byte
ADDRESS W A
SLAVE
2
3
COMMAND
BYTE
4
5 6
A P