ADM1168 Analog Devices, ADM1168 Datasheet - Page 7

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ADM1168

Manufacturer Part Number
ADM1168
Description
Super Sequencer and Monitor with Nonvolatile Fault Recording
Manufacturer
Analog Devices
Datasheet

Specifications of ADM1168

# Supplies Monitored
8
Volt Monitoring Accuracy
1%
# Output Drivers
8
Fet Drive/enable Output
Both
Package
32 ld LQFP

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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin No.
1 to 4
5 to 7
8
9
10
11, 13 to 16
12
17 to 24
25
26
27
28
29
30
31
32
1
In a typical application, all ground pins are connected together.
Mnemonic
VX1 to VX4
VP1 to VP3
VH
AGND
REFGND
NC
REFOUT
PDO8 to PDO1
PDOGND
VCCP
A0
A1
SCL
SDA
VDDCAP
GND
1
1
1
1
Description
High Impedance Inputs to Supply Fault Detectors. Fault thresholds can be set from 0.573 V to 1.375 V.
Alternatively, these pins can be used as general-purpose digital inputs.
Low Voltage Inputs to Supply Fault Detectors. Three input ranges can be set by altering the input attenuation
on a potential divider connected to these pins, the output of which connects to a supply fault detector.
These pins allow thresholds from 2.5 V to 6 V, from 1.25 V to 3 V, and from 0.573 V to 1.375 V.
High Voltage Input to Supply Fault Detectors. Three input ranges can be set by altering the input attenuation
on a potential divider connected to this pin, the output of which connects to a supply fault detector.
This pin allows thresholds from 6 V to 14.4 V and from 2.5 V to 6 V.
Ground Return for Input Attenuators.
Ground Return for On-Chip Reference Circuits.
No Connect.
Reference Output, 2.048 V. Note that a capacitor must always be connected between this pin and REFGND.
A 10 μF capacitor is recommended for this purpose.
Programmable Output Drivers.
Ground Return for Output Drivers.
Central Charge-Pump Voltage of 5.25 V. A reservoir capacitor must be connected between this pin and
GND. A 10 μF capacitor is recommended for this purpose.
Logic Input. This pin sets the seventh bit of the SMBus interface address.
Logic Input. This pin sets the sixth bit of the SMBus interface address.
SMBus Clock Pin. Bidirectional open drain requires external resistive pull-up.
SMBus Data Pin. Bidirectional open drain requires external resistive pull-up.
Device Supply Voltage. Linearly regulated from the highest of the VPx and VH pins to a typical of 4.75 V.
A capacitor must be connected between this pin and GND. A 10 μF capacitor is recommended for
this purpose.
Supply Ground.
VX1
VX2
VX3
VX4
VP1
VP2
VP3
NC = NO CONNECT.
DO NOT CONNECT TO THIS PIN.
VH
1
8
32
9
Figure 3. Pin Configuration
Rev. 0 | Page 7 of 28
PIN 1
INDICATOR
(Not to Scale)
ADM1168
TOP VIEW
16
25
2
17
4
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
PDO7
PDO8
ADM1168

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