ADP2114 Analog Devices, ADP2114 Datasheet - Page 31

• Manufacturer Part Number: ADP2114
• Description: Configurable, Dual 2 A/Single 4 A, Synchronous Step-Down DC-to-DC Regulator
• Manufacturer: Analog Devices

Table 10. Channel 1 Circuit Settings
Circuit Parameter
Output Voltage, V
Reference Voltage, V
Error Amp Transconductance, g
Current Sense Gain, C
Switching Frequency, f
Crossover Frequency, f
Zero Frequency, f
Output Inductor, L
Output Capacitor, C
Compensation Resistor, R
Compensation Capacitor, C
CHANNEL 2 CONFIGURATION AND COMPONENTS
SELECTION
Complete the following steps to configure Channel 2:
1.
2.
In this case, the following values are substituted for the
variables in Equation 18:
g
G
V
V
C
for dc bias).
From Equation 18,
R
Substituting R
For the target output voltage, V
V2SET pin through a 15 kΩ resistor to GND (see Table 4).
Because one of the fixed output voltage options is chosen,
the feedback pin (FB2) must be directly connected to the
output of Channel 2, V
Estimate the duty-cycle, D, range (see Equation 20). Ideally,
That gives the duty cycle for the 1.8 V output voltage and
the nominal input voltage of D
The minimum duty cycle for the maximum input voltage (10%
above the nominal) is D
The maximum duty cycle for the minimum input voltage (10%
less than nominal) is D
However, the actual duty cycle is larger than the calculated
values to compensate for the power losses in the converter.
Therefore, add 5% to 7% at the maximum load.
D =
m
COMP
CS
REF
OUT
OUT
= 550 μs
= 4A/V
V
= 0.6 V
= 3.3 V
= 0.8 × 47 μF (capacitance derated by 20% to account
V
OUT
= 27 kΩ.
IN
ZERO
OUT
OUT
COMP
OUT
REF
CS
SW
C
in Equation 19 yields C
COMP
COMP
MIN
OUT2
MAX
= 0.33 at V
m
.
= 0.4 at V
NOM
OUT
Setting
Step 1
Fixed, typical
Fixed, typical
Fixed, typical
Step 2
1/12 f
1/8 f
Step 3
Step 4
Equation 18
Equation 19
= 0.36 at V
= 1.8 V, connect the
CROSS
IN
IN
SW
maximum = 5.5 V.
minimum = 4.5 V.
COMP
IN
= 5.0 V.
= 1000 pF.
Value
3.3 V
0.6 V
550 μs
4 A/V
600 kHz
50 kHz
6.25 kHz
3.3 μH
47 μF, 6.3 V
27 kΩ
1000 pF
Rev. 0 | Page 31 of 40
3.
4.
The switching frequency (f
based on the Channel 1 requirements, meets the duty cycle
ranges that have been previously calculated. Therefore, this
switching frequency is acceptable.
Select the inductor by using Equation 5.
In Equation 5, V
0.6 A, and f
Therefore, when L = 3.3 μH (the closest standard value) in
Equation 3, ΔI
Although the maximum output current required is 2 A, the
maximum peak current is 3.3 A under the current limit
condition (see Table 7). Therefore, the inductor should be
rated for 3.3 A of peak current and 3 A of average current
for reliable circuit operation under all conditions.
Select the output capacitor by using Equation 8 and
Equation 9.
Equation 8 is based on the output ripple (ΔV
Equation 9 is for capacitor selection based on the transient
load performance requirements that allow, in this case, 5%
maximum deviation. As mentioned earlier, perform these
calculations and choose whatever equation yields the larger
capacitor size.
In this case, the following values are substituted for the
variables in Equation 8 and Equation 9:
ΔI
f
ΔV
ESR = 3 mΩ (typical for ceramic capacitors)
ΔI
ΔV
The output ripple based calculation (see Equation 8) dictates
that C
calculation (see Equation 9) dictates that C
meet both requirements, choose the latter. As previously
mentioned in the Control Loop Compensation section, the
capacitor value reduces with applied dc bias; therefore, select
a higher value. In this case, choose a 47 μF/6.3 V capacitor
and a 22 μF/6.3 V capacitor in parallel to meet the
requirements.
C
C
L
SW
OUT_MIN
OUT_MIN
=
L
OUT_STEP
RIPPLE
DROOP
= 600 kHz
= 0.582 A
(
V
OUT
Δ
IN
I
L
= 18 mV (1% of 1.8 V)
= 0.09 V (5% of 1.8 V)
≅
= 7.7 μF, whereas the transient load based
−
×
≅
= 1 A
V
SW
8
ΔI
f
OUT
SW
×
= 600 kHz, which results in L = 2.9 μH.
OUT_STEP
L
f
= 0.582 A.
SW
)
IN
×
= 5 V, V
×
V
V
(
OUT
ΔV
IN
×
RIPPLE
⎛
⎜
⎜
⎝
ΔI
f
OUT
SW
L
SW
) of 600 kHz, which is chosen
-
×
= 1.8 V, ΔI
ΔI
ΔV
3
L
×
DROOP
ESR
)
L
⎞
⎟
⎟
⎠
OUT
= 0.3 × I
RIPPLE
ADP2114
= 55 μF. To
), and
L
=